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AgeCommit message (Expand)Author
2016-07-07Generalize and clean up constant propagation passAndrew Waterman
2016-07-06Emit correct Verilog for SIntLiteralAndrew Waterman
2016-07-06Only assign garbage to Mem reads for non-power-of-2 depthsAndrew Waterman
2016-07-06Avoid width warnings on Mem garbage assignmentAndrew Waterman
2016-07-06Rely on $fatal vs. $finish, rather than stderr, for stop codesAndrew Waterman
2016-07-04printf: support '%c' for printing charactersWesley W. Terpstra
2016-06-27Optionally guard stop with `STOP_COND macroAndrew Waterman
2016-06-23Emit more useful code for stopAndrew Waterman
2016-06-10Change BoolType from method to valJack Koenig
2016-06-10API Cleanup - ASTJack
2016-06-10API Cleanup - PrimOp & PrimOpsJack
2016-06-10API Cleanup - ExpressionJack
2016-06-10API Cleanup - StatementJack
2016-06-10API Cleanup - WidthJack
2016-06-10API Cleanup - Field & FlipJack
2016-06-10API Cleanup - TypeJack
2016-06-10API Cleanup - Port & DirectionJack
2016-06-10API Cleanup - ModuleJack
2016-06-10Avoid exponential growth in reg code emissionAndrew Waterman
2016-06-10Add test to check compiler is thread safeJack Koenig
2016-06-10Fix Verilog codegen for regAndrew Waterman
2016-06-09Initializes register addresses. (#189)Adam Izraelevitz
2016-06-09Merge branch 'master' into fix-warningAdam Izraelevitz
2016-06-08Fix for bug introduced in #174azidar
2016-06-07Merge pull request #179 from sdtwigg/fixminwidthAdam Izraelevitz
2016-06-07Merge pull request #153 from ucb-bar/update-check-high-formAdam Izraelevitz
2016-06-07Merge pull request #182 from ucb-bar/bringup-hwachaAdam Izraelevitz
2016-06-07Fix non-thread safe Serialize by splitting it into class and objectJack Koenig
2016-06-06Fix bug in FIRRTL width inference, refactor associated functionsStephen Twigg
2016-06-06Guard mem read ports with random data if read addr is out of rangejackkoenig
2016-06-01Suppress "match may not be exhaustive" warningAndrew Waterman
2016-05-24Remove prefix checking from Check High Formjackkoenig
2016-05-24Added Errors class and fixed tests.azidar
2016-05-24add better type mismatch error messageColin Schmidt
2016-05-24Add integration test for single-ported memoryjackkoenig
2016-05-24Remove nested AND in creation of readwrite ports for mems.jackkoenig
2016-05-24Fix LowerTypes to check for wmode instead of rmodejackkoenig
2016-05-12Restructured Compiler to use Transforms. Added an InlineInstance pass.Adam Izraelevitz
2016-05-12Implement File Infojackkoenig
2016-05-11Remove trait StanzaPass and related dead codejackkoenig
2016-05-10Add test suite for Constant PropagationAdam Izraelevitz
2016-05-10Remove old SplitExp pass (replaced by SplitExpressions)jackkoenig
2016-05-10Modified Verilog compiler to use new passesAdam Izraelevitz
2016-05-10Added RemoveValidIf pass.Adam Izraelevitz
2016-05-10Added new (and correct) Split Expressions passAdam Izraelevitz
2016-05-10Added pad widths to eliminate all implicit width extendingAdam Izraelevitz
2016-05-10Added constant propagation rule for greater/less thansAdam Izraelevitz
2016-05-10Fixed emission of memory ports to all be in the same always @ clock.Adam Izraelevitz
2016-05-03Remove line in Verilog Emitter erroneously printing ); before module defjackkoenig
2016-05-03Add Tests for Check InitializationAdam Izraelevitz
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