diff options
| author | jackkoenig | 2016-04-27 00:28:06 -0700 |
|---|---|---|
| committer | jackkoenig | 2016-05-24 09:46:40 -0700 |
| commit | 44e079a0510f14abf6191b08f3082bd194d9fa60 (patch) | |
| tree | c21d7120c0e1b274bc18fc13b844d1be98d0866e /src | |
| parent | f07baed2bc46e107250c317f290af48747a98322 (diff) | |
Fix LowerTypes to check for wmode instead of rmode
Diffstat (limited to 'src')
| -rw-r--r-- | src/main/scala/firrtl/passes/LowerTypes.scala | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/scala/firrtl/passes/LowerTypes.scala b/src/main/scala/firrtl/passes/LowerTypes.scala index 2caa2ce2..1dc3f782 100644 --- a/src/main/scala/firrtl/passes/LowerTypes.scala +++ b/src/main/scala/firrtl/passes/LowerTypes.scala @@ -100,7 +100,7 @@ object LowerTypes extends Pass { def lowerTypesMemExp(e: Expression): Seq[Expression] = { val (mem, port, field, tail) = splitMemRef(e) // Fields that need to be replicated for each resulting mem - if (Seq("addr", "en", "clk", "rmode").contains(field.name)) { + if (Seq("addr", "en", "clk", "wmode").contains(field.name)) { require(tail.isEmpty) // there can't be a tail for these val memType = memDataTypeMap(mem.name) |
