| Age | Commit message (Expand) | Author |
|---|
| 2015-06-02 | Added sequential/combinational memories. Started debugging verilog backend. A... | azidar |
| 2015-05-29 | Added custom pass. Does not correctly run, stanza just spins. Requires debugg... | azidar |
| 2015-05-27 | Added sequential memories. mem no longer exists, must declare either cmem or ... | azidar |
| 2015-05-27 | Added external modules. Switched lower firrtl back to wire r; r := Register, ... | azidar |
| 2015-05-26 | Added <>. Added additional checks for primops. Added new chisel3 files. | azidar |
| 2015-05-21 | Added pad pass, used for flo backend | azidar |
| 2015-05-20 | Added Pad pass to flo.stanza, which pads widths to make := and primops strict... | azidar |
| 2015-05-19 | Updated tests | azidar |
| 2015-05-18 | First pass at a Verilog Backend. Not tested, but compiles and generates reaso... | azidar |
| 2015-05-18 | Big API Change. Pad is no longer supported. Widths of primops can be flexible... | azidar |
| 2015-05-15 | Updated firrtl for its passes to be a bit more modular, and to enable pluggin... | azidar |
| 2015-05-13 | Added source indicators from FIRRTL files. Pass in -p i to get them printed. ... | azidar |
| 2015-05-13 | Updated Spec. Added scoped-reg which exposes on-reset bug. Fixed lowering bug | azidar |
| 2015-05-05 | Added a bunch of tests. In the middle of implementing check kinds and check t... | azidar |
| 2015-05-04 | Added new Control.fir with reduced padding | azidar |
| 2015-05-04 | Fixed bug where instance types were not lowered | azidar |
| 2015-05-04 | Updated stuff | azidar |
| 2015-05-04 | Fixed change where type of mux-ss was incorrect | azidar |
| 2015-05-02 | Added a infrastructure for check passes, and wrote a few | azidar |
| 2015-05-02 | Now when expanding ConnectFrom/ToIndex, create a node for the index so it isn... | azidar |
| 2015-05-01 | Bug fix. ExpWidth was improperly evaluated during simplify (not subtracting one) | azidar |
| 2015-05-01 | Fixed performance bug where PlusWidth, MinusWidth, and ExpWidth could be simp... | azidar |
| 2015-05-01 | Fixed bug where the enable was looked at for lowering MUX. | azidar |
| 2015-04-30 | Fixed assignment to outputs not getting emitted from Expand When pass | azidar |
| 2015-04-29 | Fixed bug where a node's width was not equal to its value's | azidar |
| 2015-04-29 | Fixed bug in lowering of subfields. Fixed ModuleVec.fir to be correct | azidar |
| 2015-04-29 | Added dshl and dshr | azidar |
| 2015-04-28 | Instances are now male. Reworked lowering pass to be sane. chisel3/ModuleVec.... | azidar |
| 2015-04-27 | Added on-reset | azidar |
| 2015-04-24 | Merge branch 'master' of github.com:ucb-bar/firrtl into parser | azidar |
| 2015-04-24 | Fixed width inference bug where later constraints on the output width were no... | azidar |
| 2015-04-24 | Fixed performance bug in expand-when where equality between the consequence a... | azidar |
| 2015-04-23 | Fixed bug in lowering where the arguments to DoPrim and Pad weren't lowered | azidar |
| 2015-04-23 | Not finished commmit | azidar |
| 2015-04-23 | Added new parser. Fixed all Tests. Added on-reset to parser, but don't correc... | azidar |
| 2015-04-23 | Fixed Pad inference bug | azidar |
| 2015-04-22 | Switched to stricter primop width constraints. Implemented Pad. Added some mi... | azidar |
| 2015-04-22 | Added new test that breaks current parser. updated todo | azidar |
| 2015-04-21 | Reordered resolve-kinds and make-explicit-reset to fix bug where reset, if re... | azidar |
| 2015-04-21 | Added new test | azidar |
| 2015-04-20 | Fixed tests to use new execution arguments. Added and fixed chisel3 bugs | azidar |
| 2015-04-17 | Removed excessive debug print statements, added default call to firrtl to gen... | azidar |
| 2015-04-17 | Added temp elimination pass | azidar |
| 2015-04-17 | Fixed bug in primop lowering during type inference. Added reduce instructions... | azidar |
| 2015-04-16 | Updated parser to correctly read empty statements | azidar |
| 2015-04-16 | Merged with new stanza | azidar |
| 2015-04-15 | Finished flo backend. Restructured todo list | azidar |
| 2015-04-14 | Finished Split Expressions | azidar |
| 2015-04-14 | Finished inlining pass | azidar |
| 2015-04-13 | Stanza bug | azidar |
