Updated firrtl for its passes to be a bit more modular, and to enable plugging in other backends. Also updated a lot of tests, but not all of them because its annoying.

28 files changed, 50 insertions, 47 deletions

diff --git a/test/passes/expand-accessors/accessor-mem.fir b/test/passes/expand-accessors/accessor-mem.fir
index b87f954f..cbde1486 100644
--- a/test/passes/expand-accessors/accessor-mem.fir
+++ b/test/passes/expand-accessors/accessor-mem.fir
@@ -1,10 +1,11 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
 ;CHECK: Expand Accessors
 circuit top :
    module top :
       mem m : UInt<32>[2][2][2]
       wire i : UInt<4>
+      i := UInt(1)
       accessor a = m[i] ;CHECK: accessor a = m[i]
       accessor b = a[i] ;CHECK: b := (a[0] a[1])[i]
       accessor c = b[i] ;CHECK: c := (b[0] b[1])[i]
diff --git a/test/passes/expand-accessors/accessor-vec.fir b/test/passes/expand-accessors/accessor-vec.fir
index 6d0b5f93..81c44d1b 100644
--- a/test/passes/expand-accessors/accessor-vec.fir
+++ b/test/passes/expand-accessors/accessor-vec.fir
@@ -1,27 +1,28 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefg -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
 ;CHECK: Expand Accessors
 circuit top :
    module top :
-      wire m : UInt<32>[10][10][10]
+      wire m : UInt<32>[2][2][2]
       wire i : UInt
-      accessor a = m[i] ;CHECK: a := (m[0] m[1] m[2] m[3] m[4] m[5] m[6] m[7] m[8] m[9])[i]
-      accessor b = a[i] ;CHECK: b := (a[0] a[1] a[2] a[3] a[4] a[5] a[6] a[7] a[8] a[9])[i]
-      accessor c = b[i] ;CHECK: c := (b[0] b[1] b[2] b[3] b[4] b[5] b[6] b[7] b[8] b[9])[i]
+      i := UInt(1)
+      accessor a = m[i] ;CHECK: a := (m[0] m[1])[i]
+      accessor b = a[i] ;CHECK: b := (a[0] a[1])[i]
+      accessor c = b[i] ;CHECK: c := (b[0] b[1])[i]
       wire j : UInt
       j := c
 
-      accessor x = m[i] ;CHECK: (m[0] m[1] m[2] m[3] m[4] m[5] m[6] m[7] m[8] m[9])[i] := x
-      accessor y = x[i] ;CHECK: (x[0] x[1] x[2] x[3] x[4] x[5] x[6] x[7] x[8] x[9])[i] := y
-      accessor z = y[i] ;CHECK: (y[0] y[1] y[2] y[3] y[4] y[5] y[6] y[7] y[8] y[9])[i] := z
+      accessor x = m[i] ;CHECK: (m[0] m[1])[i] := x
+      accessor y = x[i] ;CHECK: (x[0] x[1])[i] := y
+      accessor z = y[i] ;CHECK: (y[0] y[1])[i] := z
       z := j
 
-      wire p : {n : UInt<32>[10]}
-      accessor q = p.n[i] ;CHECK: (p.n[0] p.n[1] p.n[2] p.n[3] p.n[4] p.n[5] p.n[6] p.n[7] p.n[8] p.n[9])[i] := q
+      wire p : {n : UInt<32>[2]}
+      accessor q = p.n[i] ;CHECK: (p.n[0] p.n[1])[i] := q
       q := j
 
-      wire r : {m : UInt<32>}[10]
-      accessor s = r[i] ;CHECK: s := (r[0] r[1] r[2] r[3] r[4] r[5] r[6] r[7] r[8] r[9])[i]
+      wire r : {m : UInt<32>}[2]
+      accessor s = r[i] ;CHECK: s := (r[0] r[1])[i]
       j := s.m
 
 ; CHECK: Finished Expand Accessors
diff --git a/test/passes/expand-connect-indexed/bundle-vecs.fir b/test/passes/expand-connect-indexed/bundle-vecs.fir
index c8235ade..cb63cacf 100644
--- a/test/passes/expand-connect-indexed/bundle-vecs.fir
+++ b/test/passes/expand-connect-indexed/bundle-vecs.fir
@@ -1,8 +1,8 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghi -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
 ; CHECK: Expand Indexed Connects
 circuit top :
-   module q :
+   module top :
       wire i : UInt
       wire j : UInt
 
@@ -19,11 +19,12 @@ circuit top :
       ; CHECK: node b$x#0 = i
       ; CHECK: when eq-uu(b$x#0, UInt(1)) :
       ; CHECK:    b$x := a$1$x      
-      ; CHECK: a$0$y := b$y
       ; CHECK: node b$y#0 = i
+      ; CHECK: when eq-uu(b$y#0, UInt(0)) :
+      ; CHECK:    a$0$y := b$y      
       ; CHECK: when eq-uu(b$y#0, UInt(1)) :
       ; CHECK:    a$1$y := b$y      
-      j := b
+      j := b.x
       
 ; CHECK: Finished Expand Indexed Connects
 
diff --git a/test/passes/expand-whens/bundle-init.fir b/test/passes/expand-whens/bundle-init.fir
index 48336c93..c359d871 100644
--- a/test/passes/expand-whens/bundle-init.fir
+++ b/test/passes/expand-whens/bundle-init.fir
@@ -1,7 +1,7 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijk -p cd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cd | tee %s.out | FileCheck %s
 ; CHECK: Expand Whens
 circuit top :
-   module A :
+   module top :
       reg r : { x : UInt, flip y : UInt}
       wire a : UInt
       wire b : UInt
diff --git a/test/passes/expand-whens/nested-whens.fir b/test/passes/expand-whens/nested-whens.fir
index 8185dade..2e8cc82a 100644
--- a/test/passes/expand-whens/nested-whens.fir
+++ b/test/passes/expand-whens/nested-whens.fir
@@ -1,7 +1,7 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijk -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 ; CHECK: Expand Whens
 circuit top :
-   module A :
+   module top :
       wire p : UInt
       wire q : UInt
       reg r : UInt
diff --git a/test/passes/expand-whens/one-when.fir b/test/passes/expand-whens/one-when.fir
index de513641..718f1d4b 100644
--- a/test/passes/expand-whens/one-when.fir
+++ b/test/passes/expand-whens/one-when.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijk -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
 ; CHECK: Expand Whens
 circuit top :
diff --git a/test/passes/expand-whens/partial-init.fir b/test/passes/expand-whens/partial-init.fir
index e5788c11..c9afd86c 100644
--- a/test/passes/expand-whens/partial-init.fir
+++ b/test/passes/expand-whens/partial-init.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijk -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
 ; CHECK: Expand Whens
 circuit top :
diff --git a/test/passes/expand-whens/scoped-reg.fir b/test/passes/expand-whens/scoped-reg.fir
index 20c91386..e209d94f 100644
--- a/test/passes/expand-whens/scoped-reg.fir
+++ b/test/passes/expand-whens/scoped-reg.fir
@@ -1,7 +1,7 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijk -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 ; CHECK: Expand Whens
 circuit top :
-   module A :
+   module top :
       wire p : UInt
       when p :
          reg r : UInt
diff --git a/test/passes/expand-whens/two-when.fir b/test/passes/expand-whens/two-when.fir
index d3adf5f2..7bee8444 100644
--- a/test/passes/expand-whens/two-when.fir
+++ b/test/passes/expand-whens/two-when.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijk -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
 ; CHECK: Expand Whens
 circuit top :
diff --git a/test/passes/infer-types/bundle.fir b/test/passes/infer-types/bundle.fir
index cde9be6d..5018aeef 100644
--- a/test/passes/infer-types/bundle.fir
+++ b/test/passes/infer-types/bundle.fir
@@ -1,8 +1,8 @@
-; RUN: firrtl -i %s -o %s.flo -x abcde -p ct | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p ct | tee %s.out | FileCheck %s
 
 ;CHECK: Infer Types
 circuit top :
-   module subtracter :
+   module top :
       wire z : { x : UInt, flip y: SInt}
       node x = z.x            ;CHECK: node x = z@<t:{ x : UInt@<t:UInt>, flip y : SInt@<t:SInt>}>.x@<t:UInt>
       node y = z.y            ;CHECK: node y = z@<t:{ x : UInt@<t:UInt>, flip y : SInt@<t:SInt>}>.y@<t:SInt>
diff --git a/test/passes/infer-types/gcd.fir b/test/passes/infer-types/gcd.fir
index 6e3109a5..23d92b4f 100644
--- a/test/passes/infer-types/gcd.fir
+++ b/test/passes/infer-types/gcd.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x abcde -p ct | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p ct | tee %s.out | FileCheck %s
 
 ;CHECK: Infer Types
 circuit top :
diff --git a/test/passes/infer-types/primops.fir b/test/passes/infer-types/primops.fir
index 589ab546..e0022cfb 100644
--- a/test/passes/infer-types/primops.fir
+++ b/test/passes/infer-types/primops.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x abcde -p ct | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p ct | tee %s.out | FileCheck %s
 
 ;CHECK: Infer Types
 circuit top :
diff --git a/test/passes/infer-widths/dsh.fir b/test/passes/infer-widths/dsh.fir
index 2cbdfd34..871e7e8b 100644
--- a/test/passes/infer-widths/dsh.fir
+++ b/test/passes/infer-widths/dsh.fir
@@ -1,9 +1,9 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijkl -p cd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cd | tee %s.out | FileCheck %s
 
 ;CHECK: Infer Widths
 
 circuit top :
-   module M :
+   module top :
       wire x : UInt<16>
       wire z : SInt<16>
       wire y : UInt<3>
diff --git a/test/passes/infer-widths/gcd.fir b/test/passes/infer-widths/gcd.fir
index 435540ae..4d4c3575 100644
--- a/test/passes/infer-widths/gcd.fir
+++ b/test/passes/infer-widths/gcd.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijkl -p ctd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p ctd | tee %s.out | FileCheck %s
 
 ;CHECK: Infer Widths
 circuit top :
diff --git a/test/passes/infer-widths/simple.fir b/test/passes/infer-widths/simple.fir
index 0d4dc981..6f3b51c9 100644
--- a/test/passes/infer-widths/simple.fir
+++ b/test/passes/infer-widths/simple.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijkl -p cTwd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cTwd | tee %s.out | FileCheck %s
 
 ;CHECK: Infer Widths
 circuit top :
diff --git a/test/passes/inline/gcd.fir b/test/passes/inline/gcd.fir
index 68577431..418f784b 100644
--- a/test/passes/inline/gcd.fir
+++ b/test/passes/inline/gcd.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x abcdefghijklm -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
 ;CHECK: Inline Instances
 circuit top :
diff --git a/test/passes/jacktest/Counter.fir b/test/passes/jacktest/Counter.fir
index 839a8590..d62ba9fc 100644
--- a/test/passes/jacktest/Counter.fir
+++ b/test/passes/jacktest/Counter.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cTwd | tee %s.out | FileCheck %s
 ; CHECK: Done!
 
 circuit Counter : 
diff --git a/test/passes/jacktest/MemorySearch.fir b/test/passes/jacktest/MemorySearch.fir
index 60b62ac7..18d8070d 100644
--- a/test/passes/jacktest/MemorySearch.fir
+++ b/test/passes/jacktest/MemorySearch.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p cd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cd | tee %s.out | FileCheck %s
 ; CHECK: Done!
 
 circuit MemorySearch : 
diff --git a/test/passes/jacktest/RegisterVecShift.fir b/test/passes/jacktest/RegisterVecShift.fir
index 832bd279..6188bfa2 100644
--- a/test/passes/jacktest/RegisterVecShift.fir
+++ b/test/passes/jacktest/RegisterVecShift.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p cd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cd | tee %s.out | FileCheck %s
 ; CHECK: Done!
 
 circuit RegisterVecShift : 
diff --git a/test/passes/jacktest/SIntOps.fir b/test/passes/jacktest/SIntOps.fir
index 406a09de..7785e4f9 100644
--- a/test/passes/jacktest/SIntOps.fir
+++ b/test/passes/jacktest/SIntOps.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cTwd | tee %s.out | FileCheck %s
 ; CHECK: Done!
 
 circuit SIntOps : 
diff --git a/test/passes/jacktest/Tlb.fir b/test/passes/jacktest/Tlb.fir
index b458ac4a..a86b53d6 100644
--- a/test/passes/jacktest/Tlb.fir
+++ b/test/passes/jacktest/Tlb.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cTwd | tee %s.out | FileCheck %s
 ; CHECK: Done!
 circuit Tbl : 
   module Tbl : 
diff --git a/test/passes/jacktest/UIntOps.fir b/test/passes/jacktest/UIntOps.fir
index e402f22e..6cda476e 100644
--- a/test/passes/jacktest/UIntOps.fir
+++ b/test/passes/jacktest/UIntOps.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cTwd | tee %s.out | FileCheck %s
 ; CHECK: Done!
 
 circuit UIntOps : 
diff --git a/test/passes/jacktest/bundlewire.fir b/test/passes/jacktest/bundlewire.fir
index cea54ed4..80ac45f1 100644
--- a/test/passes/jacktest/bundlewire.fir
+++ b/test/passes/jacktest/bundlewire.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p ct | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p ct | tee %s.out | FileCheck %s
 
 ; CHECK: Expand Whens
 
diff --git a/test/passes/jacktest/gcd.fir b/test/passes/jacktest/gcd.fir
index 4be5bdf9..78ac941c 100644
--- a/test/passes/jacktest/gcd.fir
+++ b/test/passes/jacktest/gcd.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cTwd | tee %s.out | FileCheck %s
 
 ;CHECK: To Flo
 circuit GCD : 
diff --git a/test/passes/jacktest/gcd2.fir b/test/passes/jacktest/gcd2.fir
index e0220ca1..df85f483 100644
--- a/test/passes/jacktest/gcd2.fir
+++ b/test/passes/jacktest/gcd2.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cTwd | tee %s.out | FileCheck %s
 ;CHECK: To Flo
 circuit GCD : 
   module GCD : 
diff --git a/test/passes/jacktest/risc.fir b/test/passes/jacktest/risc.fir
index a73d57c4..26a6abdf 100644
--- a/test/passes/jacktest/risc.fir
+++ b/test/passes/jacktest/risc.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p cTwd | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p cTwd | tee %s.out | FileCheck %s
 ; CHECK: Done!
 
 circuit Risc : 
diff --git a/test/passes/jacktest/testlower.fir b/test/passes/jacktest/testlower.fir
index 7b096ff3..e90b105b 100644
--- a/test/passes/jacktest/testlower.fir
+++ b/test/passes/jacktest/testlower.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
 ; CHECK: Expand Whens
 
diff --git a/test/passes/jacktest/vecshift.fir b/test/passes/jacktest/vecshift.fir
index 9914ea04..1d88cffd 100644
--- a/test/passes/jacktest/vecshift.fir
+++ b/test/passes/jacktest/vecshift.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
 ; CHECK: Expand Whens