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AgeCommit message (Expand)Author
2020-08-14All of src/ formatted with scalafmtchick
2020-08-15experimental SMTLib and btor2 emitter (#1826)Kevin Laeufer
2020-08-14tests: Decrease Dependency on Deprecated APIs (#1839)Kevin Laeufer
2020-08-13Deprecate support for Scala 2.11 (#1842)Jack Koenig
2020-08-13Remove LegacyAnnotation and [most] MoultingYaml (#1833)Jack Koenig
2020-08-13Cleanup Named Targets (#1311)Schuyler Eldridge
2020-08-12Combined Uniquify and LowerTypes pass (#1784)Kevin Laeufer
2020-08-11File Serialization of Annotations (#1277)Schuyler Eldridge
2020-08-11stage: allow a RunFirrtlTransformAnnotation(_:Emitter) annotation to be used ...Kevin Laeufer
2020-08-10scalatest: upgrade to 3.2.1 (#1831)Kevin Laeufer
2020-08-07ExpandWhens: VerificationStatements should be part of the simlist (#1829)Kevin Laeufer
2020-08-05Deprecate InstanceGraph (#1800)Kevin Laeufer
2020-08-01Error on ExtModules w/ same defname, diff. ports (#1734)Schuyler Eldridge
2020-07-31Avoid repeated inlining in FlattenRegUpdate (#1727)Jack Koenig
2020-07-31[WIP] Implement CircuitGraph and IRLookup to firrtl.analyses (#1603)Jiuyang Liu
2020-07-30ir: use Serializer.serialize where possible (#1809)Kevin Laeufer
2020-07-29[2.13] toSeq, Unit -> (), and postfix fixesKevin Laeufer
2020-07-29[2.13] Range.Double -> Range.BigDecimalKevin Laeufer
2020-07-29WiringTransform: fix non-determinism (#1799)Kevin Laeufer
2020-07-29RemoveWires: improve dependencies and declare ResolveKinds as an invalidation...Kevin Laeufer
2020-07-29InferTypes: fix bugs with unknown widths on ports and memories (#1769)Kevin Laeufer
2020-07-29RenameMapSpec: try rename instance and port (#1776)Kevin Laeufer
2020-07-27Fix out-of-scope reference in handwritten CHIRRTL mem testAlbert Magyar
2020-07-27Add Conditionally scoping tests to CheckSpecAlbert Magyar
2020-07-25Integrate new transforms with firrtl.stage.Forms (#1754)Schuyler Eldridge
2020-07-24Fix sign extension issue in Emitter (#1785)Albert Chen
2020-07-23fix reduction op bug ConstantPropagation (#1746)Albert Chen
2020-07-23mask bits when propagating bitwise ops (#1745)Albert Chen
2020-07-23Update negative literal emission (#1782)Albert Chen
2020-07-18Faster dedup instance graph (#1732)Kevin Laeufer
2020-07-17Propagate source locators to register update always blocks (#1743)Jack Koenig
2020-07-16Simplify CustomTransformSpecSchuyler Eldridge
2020-07-16Remove overlapping inputForm=LowForm testsSchuyler Eldridge
2020-07-15ir: store FileInfo string in escaped format (#1690)Kevin Laeufer
2020-07-14Delete outdated scalastyle configuration comments from sourceAlbert Magyar
2020-07-14Fix parsing of info on multi-line registers (#1735)Jack Koenig
2020-07-08dedup: use structural sha256 hash instead of agnostify and serialize (#1731)Kevin Laeufer
2020-07-08ir: add faster serializer (#1694)Kevin Laeufer
2020-07-07verification: emit mesage as Verilog comment (#1712)Kevin Laeufer
2020-07-01Fix unchecked type in ManipulateNames (#1726)Schuyler Eldridge
2020-06-26Enable ConvertAsserts in default Verilog compilerAlbert Magyar
2020-06-26Add test for ConvertAssertsAlbert Magyar
2020-06-25Test both LowerCaseNames and UpperCaseNamesSchuyler Eldridge
2020-06-25Add a second instance to Verilog keyword testSchuyler Eldridge
2020-06-25Test ManipulateNamesAllowlistResultAnnotationSchuyler Eldridge
2020-06-25Test ManipulateNamesSpecSchuyler Eldridge
2020-06-23Don't Dedup modules if it would change semantics (#1713)Jack Koenig
2020-06-23Basic model checking API (#1653)Tom Alcorn
2020-06-23Add support for ValidIf to ProtoBuf [de]serializationJack Koenig
2020-06-22Convert PreservesAll to explicit invalidates=falseSchuyler Eldridge
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