diff options
| author | Albert Chen | 2020-07-24 13:56:49 -0700 |
|---|---|---|
| committer | GitHub | 2020-07-24 20:56:49 +0000 |
| commit | b24b9a0167762b7f7ef1aae3fd6735a3bb1f898e (patch) | |
| tree | 69cc83d07519b5c0ab043823b14eee06c2775811 /src/test | |
| parent | e30c20d10ba47b11e06416e912ed89b6b6ce8e7b (diff) | |
Fix sign extension issue in Emitter (#1785)
* add sign-extend const-prop test
* Emitter: don't wrap Neg operand in concat
Diffstat (limited to 'src/test')
| -rw-r--r-- | src/test/scala/firrtlTests/ConstantPropagationTests.scala | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/test/scala/firrtlTests/ConstantPropagationTests.scala b/src/test/scala/firrtlTests/ConstantPropagationTests.scala index 653653d6..efe85e48 100644 --- a/src/test/scala/firrtlTests/ConstantPropagationTests.scala +++ b/src/test/scala/firrtlTests/ConstantPropagationTests.scala @@ -1651,4 +1651,14 @@ class ConstantPropagationEquivalenceSpec extends FirrtlFlatSpec { |""".stripMargin firrtlEquivalenceTest(input, transforms) } + + "propagation of signed expressions" should "have the correct signs" in { + val input = + s"""circuit SignTester : + | module SignTester : + | output ref : SInt<3> + | ref <= mux(UInt<1>("h0"), SInt<3>("h0"), neg(UInt<2>("h3"))) + |""".stripMargin + firrtlEquivalenceTest(input, transforms) + } } |
