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authorAlbert Chen2020-07-23 11:14:35 -0700
committerGitHub2020-07-23 18:14:35 +0000
commit1927dc6574b9eee315c8f24441df390f2ce793c7 (patch)
tree8f942d8d4c7c46c59db476a4329d119d0ac77c79 /src/test
parentea558ad79ed0e65df73b5a01ceea690e5b0479ca (diff)
mask bits when propagating bitwise ops (#1745)
* ConstProp: test bitwise op of signed literals * ConstProp: use bit mask for FoldOr/FoldXor * handle and also * add UIntLiteral.masked helper Co-authored-by: Jack Koenig <koenig@sifive.com>
Diffstat (limited to 'src/test')
-rw-r--r--src/test/scala/firrtlTests/ConstantPropagationTests.scala24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/test/scala/firrtlTests/ConstantPropagationTests.scala b/src/test/scala/firrtlTests/ConstantPropagationTests.scala
index 131f9466..d81f8687 100644
--- a/src/test/scala/firrtlTests/ConstantPropagationTests.scala
+++ b/src/test/scala/firrtlTests/ConstantPropagationTests.scala
@@ -1508,6 +1508,30 @@ class ConstantPropagationIntegrationSpec extends LowTransformSpec {
execute(input, check, Seq.empty)
}
+ it should "optimize bitwise operations of signed literals" in {
+ val input =
+ s"""|circuit Foo:
+ | module Foo:
+ | output out1: UInt<2>
+ | output out2: UInt<2>
+ | output out3: UInt<2>
+ | out1 <= xor(SInt<2>(-1), SInt<2>(1))
+ | out2 <= or(SInt<2>(-1), SInt<2>(1))
+ | out3 <= and(SInt<2>(-1), SInt<2>(-2))
+ |""".stripMargin
+ val check =
+ s"""|circuit Foo:
+ | module Foo:
+ | output out1: UInt<2>
+ | output out2: UInt<2>
+ | output out3: UInt<2>
+ | out1 <= UInt<2>(2)
+ | out2 <= UInt<2>(3)
+ | out3 <= UInt<2>(2)
+ |""".stripMargin
+ execute(input, check, Seq.empty)
+ }
+
}