aboutsummaryrefslogtreecommitdiff
path: root/spec
AgeCommit message (Expand)Author
2019-08-07Check mems for legal latencies; ban zero write latency. (#1147)Albert Magyar
2019-07-30Make write-under-write section for mems in spec (#1140)Albert Magyar
2019-06-03spec: mixed-input arguments for prim ops are no longer allowed (#1085)Kevin Laeufer
2019-03-25Correct a typo in spec.tex (#1063)Felix Yan
2019-01-31Add MidFIRRTL spec (#1003)Albert Magyar
2018-09-27Number all code examples & add specification build to Makefile (#894)Ben Marshall
2018-06-11Fix some typos in leftovers.txt (#822)Felix Yan
2018-03-20Correct extmodule example in spec (#768)Albert Magyar
2018-02-16Update spec for rhsSchuyler Eldridge
2017-12-24Spec erroneously says mod instead of rem.Paul Rigge
2017-03-09Sint tests and change in serialization (#456)Adam Izraelevitz
2016-11-04Cleanup license at top of every file (#364)Jack Koenig
2016-11-03Updated future release with stricter low firrtlazidar
2016-09-22Fixed width inference for add, sub (#312)Adam Izraelevitz
2016-08-17Change RW port names (#236)Angie Wang
2016-08-16Spec bugfix: update concrete reg syntax example (#233)Adam Izraelevitz
2016-07-27Merge pull request #205 from ucb-bar/add-future-releaseAdam Izraelevitz
2016-07-27Added future-release.txtazidar
2016-07-27Fixed reg concrete syntax. #197.azidar
2016-05-23Updated spec. Changed dshl width to w(e) + 2^w(n) - 1. Changed fileinfo to ju...azidar
2016-02-23Updated pdfazidar
2016-02-09Added license to FIRRTL filesazidar
2016-02-09Added changes that addressed feedback, spec ready for releaseazidar
2016-01-28Changed rmode to wmodeazidar
2016-01-28Changed mod to remazidar
2016-01-28Updated todo listazidar
2016-01-28Changed register syntax for optional reset and init valuesazidar
2016-01-27Reworked readwriter typesazidar
2016-01-25Added verilog rename passazidar
2016-01-25Removed random printlnazidar
2016-01-25Fixed support for muxes and nodes with passive aggregate typesazidar
2016-01-23Added inference to mportsazidar
2016-01-22Merge branch 'new-spec' of github.com:ucb-bar/firrtl into new-memazidar
2016-01-22Added pdfazidar
2016-01-22Added a wordazidar
2016-01-22Added funding number, as well as additional acknowledgementsazidar
2016-01-22Finished version 0.2.0. Included leftovers for future user manual.azidar
2016-01-21First cut, some unfinished sections but readableazidar
2016-01-20WIP, almost finished with expressions. Removed poison, add is invalid and val...azidar
2016-01-20WIP, need to update chirrtl with new mask syntaxazidar
2016-01-20WIP: finished partial connectazidar
2016-01-19WIP: Writing new spec.azidar
2016-01-16Finished first cut at new firrtl - time for testing! Chirrtl requires masks t...azidar
2016-01-16Fixed a bunch of tests, and minor bugsazidar
2016-01-16WIP adding chirrtlazidar
2016-01-16WIPazidar
2016-01-16WIP need to correctly output readwrite portsazidar
2015-10-06Updated spec to mention sign extending widths of operand inputsazidar
2015-09-24Added poison node to specazidar
2015-09-01Added cases of undefined behavior for cmem and smemazidar
generated by cgit v1.2.3 (git 2.25.1) at 2026-01-31 14:28:07 +0000