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authorAlbert Magyar2019-08-07 16:33:45 -0700
committermergify[bot]2019-08-07 23:33:45 +0000
commitc6c509d623e5e64e021fa311018b8ace2f3f8969 (patch)
treee1f81ce7cfaf6842f3edbb4778839cc2da3d8fc1 /spec
parent23a104d3409385718a960427f1576f508e3f473b (diff)
Check mems for legal latencies; ban zero write latency. (#1147)
* Check mems for legal latencies; ban zero write latency. * Trigger
Diffstat (limited to 'spec')
-rw-r--r--spec/spec.pdfbin269138 -> 269128 bytes
-rw-r--r--spec/spec.tex2
2 files changed, 1 insertions, 1 deletions
diff --git a/spec/spec.pdf b/spec/spec.pdf
index 42395661..9242011e 100644
--- a/spec/spec.pdf
+++ b/spec/spec.pdf
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diff --git a/spec/spec.tex b/spec/spec.tex
index fd1f045c..8685de45 100644
--- a/spec/spec.tex
+++ b/spec/spec.tex
@@ -756,7 +756,7 @@ A memory is an abstract representation of a hardware memory. It is characterized
\item A positive integer representing the number of elements in the memory.
\item A variable number of named ports, each being a read port, a write port, or readwrite port.
\item A non-negative integer indicating the read latency, which is the number of cycles after setting the port's read address before the corresponding element's value can be read from the port's data field.
-\item A non-negative integer indicating the write latency, which is the number of cycles after setting the port's write address and data before the corresponding element within the memory holds the new value.
+\item A positive integer indicating the write latency, which is the number of cycles after setting the port's write address and data before the corresponding element within the memory holds the new value.
\item A read-under-write flag indicating the behaviour when a memory location is written to while a read to that location is in progress.
\end{enumerate}