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authorazidar2016-01-25 13:22:46 -0800
committerazidar2016-01-25 13:22:46 -0800
commit7e603c38b4cda6fd632c83893c2b0d29f8a898ed (patch)
tree68f2dc310084391b4ba8f79ebe986a0101647a68 /spec
parent7eba69618f681ec9ce817ef53d8cad226094ab9c (diff)
Removed random println
Diffstat (limited to 'spec')
-rw-r--r--spec/spec.tex1
1 files changed, 1 insertions, 0 deletions
diff --git a/spec/spec.tex b/spec/spec.tex
index 48ebc8ce..aaf2577d 100644
--- a/spec/spec.tex
+++ b/spec/spec.tex
@@ -1803,6 +1803,7 @@ The concrete syntax of FIRRTL is defined in section \ref{syntax_tree}. Productio
% - Add SBits
% - *FINISHED* Add Mux expression ; that's lovely, need glitch-free mux for clock types
% - removed addw, added head and tail ; great!
+% - add rename pass for verilog
\end{document}