Spec bugfix: update concrete reg syntax example (#233)

Also added clock to reg's abstract syntax

1 files changed, 2 insertions, 2 deletions

diff --git a/spec/spec.tex b/spec/spec.tex
index 406f8c5e..fe61b84a 100644
--- a/spec/spec.tex
+++ b/spec/spec.tex
@@ -480,7 +480,7 @@ Optionally, for the purposes of circuit initialization, a register can be declar
 wire myclock: Clock
 wire myreset: UInt<1>
 wire myinit: SInt
-reg myreg: SInt, myclock, myreset, myinit
+reg myreg: SInt, myclock with: (reset => (myreset, myinit))
 ...
 \end{verbatim}
 
@@ -1754,7 +1754,7 @@ The concrete syntax of FIRRTL is defined in section \ref{syntax_tree}. Productio
                 &\pipe &\pd{type}\vv{[}\pd{int}\vv{]}                                                          &\text{Vector}\\
 \pd{field}      &=     &\opt{\vv{flip}} \pd{id} \vv{:} \pd{type}                                               &\text{Bundle Field}\\
 \pd{stmt}       &=     &\opt{\pd{info}} \vv{wire} \pd{id} \vv{:} \pd{type}                                     &\text{Wire}\\
-                &\pipe &\opt{\pd{info}} \vv{reg} \pd{id} \vv{:} \pd{type} \opt{\vv{(with:} \vv{\{reset => (}\pd{exp}, \pd{exp}\vv{)\})}}   &\text{Register}\\
+                &\pipe &\opt{\pd{info}} \vv{reg} \pd{id} \vv{:} \pd{type} \pd{exp} \opt{\vv{(with:} \vv{\{reset => (}\pd{exp}, \pd{exp}\vv{)\})}}   &\text{Register}\\
                 &\pipe &\opt{\pd{info}} \vv{mem} \pd{id} \vv{:} \vv{(}                                         &\text{Memory}\\
                 && \verb|       |\vv{data-type =>} \pd{type}\\
                 && \verb|       |\vv{depth =>} \pd{int}\\