diff options
| author | azidar | 2016-01-25 15:59:59 -0800 |
|---|---|---|
| committer | azidar | 2016-01-25 15:59:59 -0800 |
| commit | eeb565de1005927bcfd7bde15bd1d4e09394cb78 (patch) | |
| tree | 832225a9cb8fbdb3f9a5483a90c5eb581508e780 /spec | |
| parent | 25131f76567f92f18a46c41156f3a88b319591de (diff) | |
Added verilog rename pass
Diffstat (limited to 'spec')
| -rw-r--r-- | spec/spec.tex | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/spec/spec.tex b/spec/spec.tex index aaf2577d..93d62525 100644 --- a/spec/spec.tex +++ b/spec/spec.tex @@ -1797,8 +1797,8 @@ The concrete syntax of FIRRTL is defined in section \ref{syntax_tree}. Productio % - Add memory read-under-write flag ; probably overengineering, but could be a wash % - Add partial connect algorithm ; % - Add oriented types to type checker -% - Add is invalid ; good -% - Add validif ; good +% - *FINISHED* Add is invalid ; good +% - *FINISHED* Add validif ; good % - Add UBits ; andrew doesn't care, favors overloading UInt % - Add SBits % - *FINISHED* Add Mux expression ; that's lovely, need glitch-free mux for clock types |