chiselX - Chisel with SFC compatibility

Age	Commit message (Collapse)	Author
2022-09-01	Remove incorrect clock warning on Mem.read (backport #2721) (#2722)	mergify[bot]
	* Remove incorrect clock warning on Mem.read (#2721) Mem.read is combinational and thus unaffected by the clock, and so it does not make sense to issue warnings about the current clock in this context. (cherry picked from commit 5fdf74f95e64cb69d6097547f20d789a83dbd735) * Keep old version of MemBase.clockWarning for binary compatibility This method is impossible for users to call, but it is easy enough to keep around a version of it to make MiMa happy. Co-authored-by: Andrew Waterman <andrew@sifive.com> Co-authored-by: Jack Koenig <koenig@sifive.com>
2022-02-01	Optional clock param for memory ports (#2333) (#2382)	mergify[bot]
	Warn if clock at memory instantiation differs from clock bound at port creation and port clock is not manually passed Co-authored-by: Jack Koenig <koenig@sifive.com> (cherry picked from commit 465805ec7b2696a985eaa12cf9c6868f11ac2931) Co-authored-by: Aditya Naik <91489422+adkian-sifive@users.noreply.github.com>
2022-01-10	Apply scalafmt	Jack Koenig
	Command: sbt scalafmtAll
2020-10-01	Move Chisel3 to SPDX license conventions (#1604)	Chick Markley
	Change source and other relevant files to use SPDX license LICENSE file moved from src/ to ./ Changed license file to refer to this per recommendation using_spdx_license_list_short_identifiers WARNING: Tests fail with as of yet undiagnosed error ``` [error] Failed: Total 691, Failed 19, Errors 0, Passed 672, Ignored 15 [error] Failed tests: [error] chiselTests.QueueSpec [error] examples.VendingMachineGeneratorSpec [error] chiselTests.HarnessSpec [error] chiselTests.ConnectSpec [error] chiselTests.aop.SelectSpec [error] chiselTests.PopCountSpec [error] chiselTests.CloneModuleSpec [error] (Test / test) sbt.TestsFailedException: Tests unsuccessful [error] Total time: 379 s (06:19), completed Sep 30, 2020 12:38:17 AM sbt:chisel3> ```
2020-06-29	- A few final fixes after the rebase	chick

2020-06-29	This adds a mechanism for the unittests to be run with the TreadleBackend	chick
	This mechanism is not enabled and should not change the behavior of existing tests A following PR will deliver a switch that will allow changing the backend. The reasons for this PR - Treadle tests run much faster, enabling quicker debugging and CI cycles - This will help ensure fidelity of Treadle to the Verilator backend A few tests are marked as verilator only due to black box limitations Change treadle to a direct dependency I tried to make it a test only dependency but the TesterDriver sits in src/main requiring that regular compile have access to treadle Oops, made treadle the default A number of changes in response to @ducky64 review - made backend check clearer and add error handling for multiple backends specified - Fixed duplicate TargetDirAnnotation uses in Treadle backend - Cleaned up BlackBox test formatting - Undid unnecessary debugging changes from Counter - Undid .gitignore change, that should be on another PR A number of changes in response to @ducky64 review - Undid debugging changes made to BitWiseOps
2020-06-22	Use ChiselStage in Tests	Schuyler Eldridge
	This migrates the tests to Chisel 3.4/FIRRTL 1.4. This primarily involves removing usages of deprecated methods including: - Remove usages of Driver - Use ChiselStage methods instead of BackendCompilationUtilities methods - Use Dependency API for custom transforms - Use extractCause to unpack StackError Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2019-02-19	Mainline Chisel multi-clock functionality (#1013)	edwardcwang
	Close #1009
2019-01-25	WireDefault instead of WireInit, keep WireInit around (#986)	Martin Schoeberl

2018-12-04	Add asBool, deprecate toBool	Jack Koenig

2018-06-01	Literals set their ref so they no longer get named (#826)	Jack Koenig
	Fixes #763 Add tests for #763 and #472 This has a few implications * Constructing a literal no longer increments _T_ suffixes * Internally, wrapping a literal Bits in Node(...) will work * Literal Bools work in withReset/withClockAndReset
2017-08-17	More of the bindings refactor (#635)	Richard Lin
	Rest of the binding refactor
2017-08-17	Make Reset a trait (#672)	Jack Koenig
	Bool implements Reset. Compatibility package includes an implicit conversion from Reset to Bool.
2017-04-02	Make Module instantiations draw clock from Builder instead of parent (#568)	Jack Koenig
	Fixes #567
2017-03-08	Deprecate old Reg with nulls constructor (#455)	Richard Lin

2017-02-16	Add support for clock and reset scoping (#509)	Jack Koenig
	withClockAndReset, withReset, and withClock allow changing the implicit clock and reset. Module.clock and Module.reset provide access to the current implicit clock and reset.