chiselX - Chisel with SFC compatibility

Age	Commit message (Collapse)	Author
2016-09-26	Add Strict default for compile options	ducky

2016-09-23	Merge branch 'master' into gsdt	Jim Lawson

2016-09-21	Expose FIRRTL asClock construct	Andrew Waterman
	Additionally, fix Clock.asUInt (previously, it threw an esoteric exception), and add a simple test of both.
2016-09-21	Make implicit clock name consistent (#288)	Andrew Waterman
	In the Chisel frontend, the implicit clock is named clock, but in the generated FIRRTL, it is named clk. There is no reason for this discrepancy, and yet fixing it is painful, as it will break test harnesses. Better to take the pain now than later. Resolves #258.
2016-09-15	Merge branch 'master' into gsdt	Jim Lawson

2016-09-07	Add Printable (#270)	Jack Koenig
	Printable is a new type that changes how printing of Chisel types is represented It uses an ordered collection rather than a format string and specifiers Features: - Custom String Interpolator for Scala-like printf - String-like manipulation of "hardware strings" for custom pretty-printing - Default pretty-printing for Chisel data types
2016-09-01	Move connection implicits from Module constructor to connection methods.	Jim Lawson
	Eliminate builder compileOptions.
2016-08-30	Merge branch 'master' into gsdt	Jim Lawson

2016-08-29	Rename CompileOptions implicit objects.	Jim Lawson

2016-08-29	Pass compileOptions as an implicit Module parameter.	Jim Lawson

2016-08-29	Rename individual compile options.	Jim Lawson
	Stricter values are "true". Current default (not strict) values are "false".
2016-08-24	Per Chisel meeting.	chick
	signalName -> instanceName SignalId -> InstanceId Based on Stephen's comments on PR
2016-08-23	Swap name of compileOption "assumeNoDirectionIsOutput" to ↵	Jim Lawson
	"assumeNoDirectionIsInput".
2016-08-21	provides signal name methods for firrtl annotation and chisel testers	Donggyu Kim
	* signalName: returns the chirrtl name of the signal * pathName: returns the full path name of the signal from the top module * parentPathName: returns the full path of the signal's parent module instance from the top module * parentModName: returns the signal's parent module(not instance) name.
2016-08-18	Add assumeNoDirectionIsOutput.	Jim Lawson

2016-08-18	Merge branch 'sdtwigg_connectwrap_renamechisel3' into gsdt_tests	Jim Lawson
	Revive support for firrtl flip direction. Remove compileOptions.internalConnectionToInputOk
2016-08-17	Rocket-chip updates.	Jim Lawson
	Assume LHSItOutput if neither side is driving. Restore Wire()'s removal of direction in binding.
2016-08-17	Reduce rocket-chip elaboration errors.	Jim Lawson

2016-08-16	Add component to signature.	Jim Lawson

2016-08-16	Provide public SignalID trait to be used to conjure up a signal identifier.	Jim Lawson

2016-08-12	Use compileOptions to determine if Missing...FieldExceptions are thrown.	Jim Lawson

2016-08-12	Merge branch 'compile_options' into sdtwigg_connectwrap_renamechisel3	Jim Lawson

2016-08-12	Add support for per-Module compilation options.	Jim Lawson
	Nothing uses these now, but when we integrate Stephen's PR200, we'll need a way to selectively enable some strict connection checks on a file by file basis. We plan to do this using package imports which will define suitable compilation options.
2016-08-11	Merge branch 'master' into sdtwigg_connectwrap_renamechisel3	Jim Lawson

2016-08-09	Legalize identifier names before printing	Andrew Waterman
	It's not entirely clear what the FIRRTL implementation supports, so I'm using the ANSI C requirements for the time being.
2016-07-19	Merge in "complete" versions of Mem, Reg.	Jim Lawson

2016-07-19	Merge branch 'sdtwigg_rebase_renamechisel3' into sdtwigg_wrap_renamechisel3	Jim Lawson

2016-07-18	Update Chisel -> chisel3 references.	Jim Lawson

2016-07-18	Rename "Chisel" to "chisel3" (only git mv).	Jim Lawson

2016-06-20	Rename "package", "import", and explicit references to "chisel3".	Jim Lawson

2016-06-20	Rename chisel3 package.	Jim Lawson