diff options
| author | Jim Lawson | 2016-08-30 16:13:41 -0700 |
|---|---|---|
| committer | Jim Lawson | 2016-08-30 16:13:41 -0700 |
| commit | 19b7f92504dadce9226126751e25d8abbe17fcc3 (patch) | |
| tree | be8a8c0b92c567c4ec94b7c5a08e223eca6fa969 /chiselFrontend/src/main/scala/chisel3/internal | |
| parent | 8002f7ac6731b1da5e0d8e7b1536995a23878037 (diff) | |
| parent | 0c34480c5049c000e03b7b1a174e4bd6cca682cb (diff) | |
Merge branch 'master' into gsdt
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/internal')
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/internal/Builder.scala | 34 |
1 files changed, 33 insertions, 1 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala b/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala index 3191e384..0376e067 100644 --- a/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala +++ b/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala @@ -55,7 +55,18 @@ private[chisel3] class IdGen { } } -private[chisel3] trait HasId { +/** Public API to access Node/Signal names. + * currently, the node's name, the full path name, and references to its parent Module and component. + * These are only valid once the design has been elaborated, and should not be used during its construction. + */ +trait InstanceId { + def instanceName: String + def pathName: String + def parentPathName: String + def parentModName: String +} + +private[chisel3] trait HasId extends InstanceId { private[chisel3] def _onModuleClose: Unit = {} // scalastyle:ignore method.name private[chisel3] val _parent: Option[Module] = Builder.currentModule _parent.foreach(_.addId(this)) @@ -95,6 +106,27 @@ private[chisel3] trait HasId { private[chisel3] def setRef(parent: HasId, index: Int): Unit = setRef(Index(Node(parent), ILit(index))) private[chisel3] def setRef(parent: HasId, index: UInt): Unit = setRef(Index(Node(parent), index.ref)) private[chisel3] def getRef: Arg = _ref.get + + // Implementation of public methods. + def instanceName = _parent match { + case Some(p) => p._component match { + case Some(c) => getRef fullName c + case None => throwException("signalName/pathName should be called after circuit elaboration") + } + case None => throwException("this cannot happen") + } + def pathName = _parent match { + case None => instanceName + case Some(p) => s"${p.pathName}.$instanceName" + } + def parentPathName = _parent match { + case Some(p) => p.pathName + case None => throwException(s"$instanceName doesn't have a parent") + } + def parentModName = _parent match { + case Some(p) => p.modName + case None => throwException(s"$instanceName doesn't have a parent") + } } private[chisel3] class DynamicContext(moduleCompileOptions: Option[ExplicitCompileOptions] = None) { |
