summaryrefslogtreecommitdiff
path: root/chiselFrontend/src/main/scala/chisel3/internal
diff options
context:
space:
mode:
authorJim Lawson2016-08-29 12:17:48 -0700
committerJim Lawson2016-08-29 12:17:48 -0700
commit6df3a785f8abe706838bc5b4b35c3374b6512f96 (patch)
treea6b4961f966b69577ff4de28f2aa770b9355b7d9 /chiselFrontend/src/main/scala/chisel3/internal
parent5fcdd12fe92bd22f9cdfb8f5e39e510684b709bf (diff)
Pass compileOptions as an implicit Module parameter.
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/internal')
-rw-r--r--chiselFrontend/src/main/scala/chisel3/internal/Builder.scala14
-rw-r--r--chiselFrontend/src/main/scala/chisel3/internal/CompileOptions.scala39
2 files changed, 32 insertions, 21 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala b/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala
index 9f2b1631..9b656dea 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala
+++ b/chiselFrontend/src/main/scala/chisel3/internal/Builder.scala
@@ -97,16 +97,16 @@ private[chisel3] trait HasId {
private[chisel3] def getRef: Arg = _ref.get
}
-private[chisel3] class DynamicContext(optionMap: Option[Map[String, String]] = None) {
+private[chisel3] class DynamicContext(moduleCompileOptions: Option[ExplicitCompileOptions] = None) {
val idGen = new IdGen
val globalNamespace = new Namespace(None, Set())
val components = ArrayBuffer[Component]()
var currentModule: Option[Module] = None
val errors = new ErrorLog
- val compileOptions = new CompileOptions(optionMap match {
- case Some(map: Map[String, String]) => map
- case None => Map[String, String]()
- })
+ val compileOptions = moduleCompileOptions match {
+ case Some(options: ExplicitCompileOptions) => options
+ case None => chisel3.NotStrict.NotStrictCompileOptions
+ }
}
private[chisel3] object Builder {
@@ -147,8 +147,8 @@ private[chisel3] object Builder {
def errors: ErrorLog = dynamicContext.errors
def error(m: => String): Unit = errors.error(m)
- def build[T <: Module](f: => T, optionMap: Option[Map[String, String]] = None): Circuit = {
- dynamicContextVar.withValue(Some(new DynamicContext(optionMap))) {
+ def build[T <: Module](f: => T, moduleCompileOptions: Option[ExplicitCompileOptions] = None): Circuit = {
+ dynamicContextVar.withValue(Some(new DynamicContext(moduleCompileOptions))) {
errors.info("Elaborating design...")
val mod = f
mod.forceName(mod.name, globalNamespace)
diff --git a/chiselFrontend/src/main/scala/chisel3/internal/CompileOptions.scala b/chiselFrontend/src/main/scala/chisel3/internal/CompileOptions.scala
index 31d441c1..2890f6dc 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/CompileOptions.scala
+++ b/chiselFrontend/src/main/scala/chisel3/internal/CompileOptions.scala
@@ -2,21 +2,32 @@
package chisel3.internal
-/** Initialize compilation options from a string map.
- *
- * @param optionsMap the map from "option" to "value"
- */
-class CompileOptions(optionsMap: Map[String, String]) {
- // The default for settings related to "strictness".
- val strictDefault: String = optionsMap.getOrElse("strict", "false")
- val looseDefault: String = (!(strictDefault.toBoolean)).toString
+trait CompileOptions {
// Should Bundle connections require a strict match of fields.
// If true and the same fields aren't present in both source and sink, a MissingFieldException,
// MissingLeftFieldException, or MissingRightFieldException will be thrown.
- val connectFieldsMustMatch: Boolean = optionsMap.getOrElse("connectFieldsMustMatch", strictDefault).toBoolean
- val regTypeMustBeUnbound: Boolean = optionsMap.getOrElse("regTypeMustBeUnbound", strictDefault).toBoolean
- val declaredTypeMustBeUnbound: Boolean = optionsMap.getOrElse("declaredTypeMustBeUnbound", strictDefault).toBoolean
- val requireIOWrap: Boolean = optionsMap.getOrElse("requireIOWrap", strictDefault).toBoolean
- val dontTryConnectionsSwapped: Boolean = optionsMap.getOrElse("dontTryConnectionsSwapped", strictDefault).toBoolean
- val dontAssumeDirectionality: Boolean = optionsMap.getOrElse("dontAssumeDirectionality", strictDefault).toBoolean
+ val connectFieldsMustMatch: Boolean
+ val declaredTypeMustBeUnbound: Boolean
+ val requireIOWrap: Boolean
+ val dontTryConnectionsSwapped: Boolean
+ val dontAssumeDirectionality: Boolean
}
+
+trait ExplicitCompileOptions extends CompileOptions
+
+///** Initialize compilation options from a string map.
+// *
+// * @param optionsMap the map from "option" to "value"
+// */
+//class CompileOptions(optionsMap: Map[String, String]) {
+// // The default for settings related to "strictness".
+// val strictDefault: String = optionsMap.getOrElse("strict", "false")
+// // Should Bundle connections require a strict match of fields.
+// // If true and the same fields aren't present in both source and sink, a MissingFieldException,
+// // MissingLeftFieldException, or MissingRightFieldException will be thrown.
+// val connectFieldsMustMatch: Boolean = optionsMap.getOrElse("connectFieldsMustMatch", strictDefault).toBoolean
+// val declaredTypeMustBeUnbound: Boolean = optionsMap.getOrElse("declaredTypeMustBeUnbound", strictDefault).toBoolean
+// val requireIOWrap: Boolean = optionsMap.getOrElse("requireIOWrap", strictDefault).toBoolean
+// val dontTryConnectionsSwapped: Boolean = optionsMap.getOrElse("dontTryConnectionsSwapped", strictDefault).toBoolean
+// val dontAssumeDirectionality: Boolean = optionsMap.getOrElse("dontAssumeDirectionality", strictDefault).toBoolean
+//}