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path: root/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala
AgeCommit message (Expand)Author
2017-03-13Revert "Change Vec creation to check if gen is lit (and hence needs t… (#530)Jim Lawson
2017-02-27Record: allow elements to start with a digitWesley W. Terpstra
2017-02-16Add scaladoc examples for Vec and Bundle (#511)Chick Markley
2017-02-15Implement asTypeOf, refactor internal APIs (#450)Richard Lin
2017-02-03Added vec IO tests for #104 (#480)Jim Lawson
2017-01-31Make Module and Bundle properly use empty namespacesJack
2017-01-20Add Record as new superclass of Bundle (#366)Jack Koenig
2017-01-13Make fromBits work with types other than UInt (#424)grebe
2016-12-02Merge branch 'master' into exceptionfixJim Lawson
2016-11-29Add feature warnings to build, fix feature warnings, fix some documentation (...Richard Lin
2016-11-22Disallow chained apply (#380)Richard Lin
2016-11-21Restyle Bool constructors, move compatibility deprecations into compatibility...ducky
2016-11-21Break out deprecated literal constructors, refactor all the things!ducky
2016-11-10Throw exceptions for cloneType failures - fix #358Jim Lawson
2016-10-28Plug holes where defaultCompileOptions leaked inAndrew Waterman
2016-10-27Refactor and fix field reflection (#342)Andrew Waterman
2016-10-06Merge branch 'master' into tobits-deprecationJim Lawson
2016-10-05Merge pull request #315 from ucb-bar/fix-rocket-chipJim Lawson
2016-10-05Use modulo addressing for dynamic Vec/Mem accessesAndrew Waterman
2016-10-05Give <> and := legacy behavior in compatibility modeAndrew Waterman
2016-09-29Manual dead code elimination.Jim Lawson
2016-09-29Consolidate CompileOptions and re-enable NotStrict pending macro work.Jim Lawson
2016-09-29Massive rename of CompileOptions.Jim Lawson
2016-09-28Don't use firrtlDirection for direction checks - fix #298.Jim Lawson
2016-09-15Merge branch 'master' into gsdtJim Lawson
2016-09-09Convert to NotStrict for internal connection checks.Jim Lawson
2016-09-07Add Printable (#270)Jack Koenig
2016-09-01Remove O(n^2) code in Vec.apply(Seq)Andrew Waterman
2016-09-01Deprecate Vec.fill() offering Vec(Seq.fill()).Jim Lawson
2016-09-01Move connection implicits from Module constructor to connection methods.Jim Lawson
2016-08-31Check that Vecs have homogeneous typesAndrew Waterman
2016-08-30Merge branch 'master' into gsdtJim Lawson
2016-08-25Use bulkConnect in Vec,fill if any (flattened) element of the Vec has a direc...Jim Lawson
2016-08-21provides signal name methods for firrtl annotation and chisel testersDonggyu Kim
2016-08-18Merge branch 'sdtwigg_connectwrap_renamechisel3' into gsdt_testsJim Lawson
2016-08-16Add component to signature.Jim Lawson
2016-08-16Merge branch 'master' into sdtwigg_connectwrap_renamechisel3Jim Lawson
2016-08-15Make "def width" a private API; expose isWidthKnown instead (#257)Andrew Waterman
2016-07-25Minimize differences with master.Jim Lawson
2016-07-21Introduce chiselCloneType to distinguish from cloneType.Jim Lawson
2016-07-20Distinguish between ?Int.Lit and ?Int.widthJim Lawson
2016-07-20Compile ok.Jim Lawson
2016-07-19Incorporate connection logic.Jim Lawson
2016-07-18Update Chisel -> chisel3 references.Jim Lawson
2016-07-18Rename "Chisel" to "chisel3" (only git mv).Jim Lawson
2016-06-20Rename "package", "import", and explicit references to "chisel3".Jim Lawson
2016-06-20Rename chisel3 package.Jim Lawson
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