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2016-08-15Remove stanza (#231)Adam Izraelevitz
* Removed stanza implementation/tests. In the future we can move the stanza tests over, but for now they should be deleted. * Added back integration .fir files * Added Makefile to give Travis hooks * Added firrtl script (was ignored before)
2016-01-28Updated all tests to passazidar
2016-01-16WIP. Fixed a bunch of tests. Starting on implementing chirrtl, but hit ↵azidar
roadblock in assigning clocked ports
2016-01-16New memory works with verilog. Slowly changing tests and fixing bugs.azidar
Decided to not have Conditionally in low firrtl - instead, Print and Stop have enables
2016-01-16WIP need to correctly output readwrite portsazidar
2015-08-24Changed all tests to use verilog backend.azidar
2015-07-31Updated tests to pipe from stderr to stdoutazidar
2015-07-14Added tests for clocks. Added remove scope and special chars passes. Added ↵azidar
tests. Made more tests pass
2015-07-14Pass most tests. The ones that do not pass are not expected to, yetazidar
2015-05-18First pass at a Verilog Backend. Not tested, but compiles and generates ↵azidar
reasonable verilog. Requires inlining, future versions will instantiate modules
2015-05-18Big API Change. Pad is no longer supported. Widths of primops can be ↵azidar
flexible, and the output is usually the max of the inputs. Removed all u/s variants, which need to be dealt with in backends where it matters
2015-04-28Instances are now male. Reworked lowering pass to be sane. ↵azidar
chisel3/ModuleVec.fir doesn't work because incorrecly generated?
2015-04-23Added new parser. Fixed all Tests. Added on-reset to parser, but don't ↵azidar
correctly handle it in compiler.
2015-04-20Fixed tests to use new execution arguments. Added and fixed chisel3 bugsazidar
2015-04-17Fixed bug in primop lowering during type inference. Added reduce ↵azidar
instructions and renamed concat -> cat, equal -> eq, and added neq and neg
2015-04-10Updated StanzaPatrick Li
2015-04-08Added test to show correctness of gender inference and loweringazidar
2015-04-08Fixed bug in lowering that incorrectly determined genders when subfieldedazidar
2015-03-27Corrected register init by adding initialization of registers pass after ↵azidar
lowering. Finished expand-whens. Needs more thorough testing of instances
2015-03-12Switched bundles from gender to flipazidar
2015-03-10Finished resolve gendersazidar