chiselX - Chisel with SFC compatibility

Age	Commit message (Expand)	Author
2016-06-08	Rename packages to lowercase chisel, add compatibility layer	ducky
2016-05-20	Merge pull request #186 from ucb-bar/sloc_impl	Richard Lin
2016-05-20	Implementation of source locators	ducky
2016-05-20	Update BackendCompilationUtilities.verilogToCpp to specify top-module	jackkoenig
2016-03-18	Only randomize directory names during testing	jackkoenig
2016-02-10	TesterDriverSpec is simpler and cleaner, extraneous circuit has been removed.	chick
2016-02-10	Added some comments describing potential use of the finish method hook	chick
2016-02-09	Added support for finish method of BasicTester to be overridden in a subclass...	chick
2016-01-23	Move firrtl subpackage to inside internal subpackage.	jackkoenig
2015-12-15	Meaningful error when resource copy fails	ducky
2015-12-14	Modify TestDriver to take resource paths instead of Files	ducky
2015-12-11	Refactor tests to use stop() and assert() instead of io.error/io.done	ducky
2015-12-11	Add stop() in BasicTester as a replacement for io.done	ducky
2015-12-09	Refactor testharness generation to create directories and have minimal API	ducky
2015-12-09	Optional additional Verilog sources to include in execute	ducky
2015-12-09	Extend TesterDriver to optionally take in additional Verilog sources	ducky
2015-11-04	Fix new style errors	ducky
2015-11-04	Remove Parameters library and refactor Driver.	Henry Cook
2015-10-20	Whitespace / comment style fixes	ducky
2015-08-14	more tests	Henry Cook
2015-08-13	Counter tests	Henry Cook
2015-08-12	being to convert tests to scala-test; tests compile and run	Henry Cook
2015-08-12	Remove old testers for now	Andrew Waterman
2015-08-11	Get tests closer to compiling	Andrew Waterman
2015-08-06	updated Tester compiles with a few abstracted fields	Henry Cook
2015-08-06	subdir for Chisel.testers package	Henry Cook