sfcX - Scala FIRRTL Compiler for chiselX

Age	Commit message (Collapse)	Author
2016-08-15	Remove stanza (#231)	Adam Izraelevitz
	* Removed stanza implementation/tests. In the future we can move the stanza tests over, but for now they should be deleted. * Added back integration .fir files * Added Makefile to give Travis hooks * Added firrtl script (was ignored before)
2016-01-16	Fixed a bunch of tests, and minor bugs	azidar

2016-01-16	WIP. Compiles and almost done with verilog backend. Need to think about ↵	azidar
	emitting ports (and the assignments to them)
2015-08-24	Changed all tests to use verilog backend.	azidar

2015-07-30	Updated error and feature tests. Fixed bug in detecting incorrect genders	azidar

2015-07-14	Added tests for clocks. Added remove scope and special chars passes. Added ↵	azidar
	tests. Made more tests pass
2015-05-27	Added sequential memories. mem no longer exists, must declare either cmem or ↵	azidar
	smem. Added firrtl-gensym utility to generate a hashmap of names
2015-05-20	Added Pad pass to flo.stanza, which pads widths to make := and primops ↵	azidar
	strict. Have not tested this
2015-05-02	Added a infrastructure for check passes, and wrote a few	azidar