| Age | Commit message (Expand) | Author |
|---|---|---|
| 2016-08-15 | Remove stanza (#231) | Adam Izraelevitz |
| 2016-01-16 | Fixed a bunch of tests, and minor bugs | azidar |
| 2016-01-16 | WIP. Compiles and almost done with verilog backend. Need to think about emitt... | azidar |
| 2015-08-24 | Changed all tests to use verilog backend. | azidar |
| 2015-07-30 | Updated error and feature tests. Fixed bug in detecting incorrect genders | azidar |
| 2015-07-14 | Added tests for clocks. Added remove scope and special chars passes. Added te... | azidar |
| 2015-05-27 | Added sequential memories. mem no longer exists, must declare either cmem or ... | azidar |
| 2015-05-20 | Added Pad pass to flo.stanza, which pads widths to make := and primops strict... | azidar |
| 2015-05-02 | Added a infrastructure for check passes, and wrote a few | azidar |
 |
index : sfcX | |
| Scala FIRRTL Compiler for chiselX |
| aboutsummaryrefslogtreecommitdiff |