aboutsummaryrefslogtreecommitdiff
path: root/src/main/stanza/firrtl-ir.stanza
AgeCommit message (Collapse)Author
2016-08-15Remove stanza (#231)Adam Izraelevitz
* Removed stanza implementation/tests. In the future we can move the stanza tests over, but for now they should be deleted. * Added back integration .fir files * Added Makefile to give Travis hooks * Added firrtl script (was ignored before)
2016-02-09Added license to FIRRTL filesazidar
2016-01-28Changed mod to remazidar
2016-01-28Updated with new primops. Removed addw,subw,quo,rem,bit. Added ↵azidar
head,tail,asClock.
2016-01-25Added isinvalid and validifazidar
2016-01-24Added muxing on passive aggregate typesazidar
2016-01-23Changed chirrtl to not require known mask valuesazidar
2016-01-16WIP adding chirrtlazidar
2016-01-16WIP Almost there, need to generate enable connectionsazidar
2016-01-16WIP. Fixed a bunch of tests. Starting on implementing chirrtl, but hit ↵azidar
roadblock in assigning clocked ports
2016-01-16New memory works with verilog. Slowly changing tests and fixing bugs.azidar
Decided to not have Conditionally in low firrtl - instead, Print and Stop have enables
2016-01-16WIPazidar
2016-01-16Finished adding clocks to Stop and Printazidar
2015-10-07Added Printf and Stop to firrtl. #23 #24.azidar
2015-10-01Changed DefMemory to be a non-vector type with a size member. Necessary for ↵azidar
ASIC backend.
2015-08-25Removed IntWidth, now only use LongWidth. Now do width inference for ↵azidar
Constants in parser, and correctly subtract 1 (except when 0) when calculating width from num-bits of BigInt
2015-08-20Added Poison node. Includes tests. #26.azidar
2015-08-19Switched to new bigint libraryazidar
2015-08-04Added check for reading from outputs with flipsazidar
2015-08-03Changed name mangling to use _ as a delin. Fixed bug in checking forazidar
invalid <> assignments.
2015-08-03Fixed performance bug in Split Expressions. Changed delin for connect ↵azidar
indexed. Fixed various broken tests.
2015-07-30Added eqv for bitwise equality, and change eq to be arithmetic equalityazidar
2015-07-28Integrated bigint. Mostly works, but getting "cast" error for make Test.Adam Izraelevitz
2015-07-17Datapath compiles with Chisel 2.0 -> FIRRTL -> Verilog!Adam Izraelevitz
Had to separate initialization check pass Need to write dead code elimination pass Added LongWidth to support dshl that are huge
2015-07-16Fixed rename to work with chisel3 stuffazidar
2015-07-14Added tests for clocks. Added remove scope and special chars passes. Added ↵azidar
tests. Made more tests pass
2015-07-14Added clock supportazidar
2015-07-14Still partial commit, many tests pass. Many tests fail.azidar
2015-07-14In progress commitazidar
2015-06-02Added sequential/combinational memories. Started debugging verilog backend. ↵azidar
Added Long support so UInt(LARGENUMBER) works
2015-05-29Added custom pass. Does not correctly run, stanza just spins. Requires ↵azidar
debugging.
2015-05-27Added sequential memories. mem no longer exists, must declare either cmem or ↵azidar
smem. Added firrtl-gensym utility to generate a hashmap of names
2015-05-27Added external modules. Switched lower firrtl back to wire r; r := Register, ↵azidar
instead of using nodes. Added a renaming pass for different backends. This will likely get deprecated, as a more robust name mangling scheme could be needed
2015-05-26Added <>. Added additional checks for primops. Added new chisel3 files.azidar
2015-05-18Big API Change. Pad is no longer supported. Widths of primops can be ↵azidar
flexible, and the output is usually the max of the inputs. Removed all u/s variants, which need to be dealt with in backends where it matters
2015-05-13Added source indicators from FIRRTL files. Pass in -p i to get them printed. ↵azidar
Should show up with check passes
2015-05-05Added a bunch of tests. In the middle of implementing check kinds and check ↵azidar
types. Does not compile
2015-05-02Added a infrastructure for check passes, and wrote a fewazidar
2015-04-29Added dshl and dshrazidar
2015-04-23Not finished commmitazidar
2015-04-23Added new parser. Fixed all Tests. Added on-reset to parser, but don't ↵azidar
correctly handle it in compiler.
2015-04-22Switched to stricter primop width constraints. Implemented Pad. Added some ↵azidar
missing primops
2015-04-17Fixed bug in primop lowering during type inference. Added reduce ↵azidar
instructions and renamed concat -> cat, equal -> eq, and added neq and neg
2015-04-16Merged with new stanzaazidar
2015-04-15Finished flo backend. Restructured todo listazidar
2015-04-10Updated StanzaPatrick Li
2015-04-09Added more 'fake' tests. infer-widths now collects constraintsazidar
2015-03-25Correctly do when expansion, minus enables and outputting lowered formazidar
2015-03-24Changed PrimOp to interfacePatrick Li
2015-03-23Finished first two parts of expand-whens pass. Fixed inits by adding ↵azidar
WRegInit and removing Null and initialize-register pass