| Age | Commit message (Expand) | Author |
|---|
| 2016-07-20 | Distinguish between ?Int.Lit and ?Int.width | Jim Lawson |
| 2016-07-20 | Generate better names for nodes (#190) | Jack Koenig |
| 2016-07-20 | Compile ok. | Jim Lawson |
| 2016-07-19 | Fix LitBinding and MultiAssign tests. | Jim Lawson |
| 2016-07-19 | Incorporate connection logic. | Jim Lawson |
| 2016-07-19 | Merge branch 'sdtwigg_rebase_renamechisel3' into sdtwigg_wrap_renamechisel3 | Jim Lawson |
| 2016-07-18 | Update Chisel -> chisel3 references. | Jim Lawson |
| 2016-07-18 | Rename "Chisel" to "chisel3" (only git mv). | Jim Lawson |
| 2016-07-11 | bitpat should keep the width of uint (#232) | Donggyu |
| 2016-07-07 | Don't check GCD result before sending it a request | Andrew Waterman |
| 2016-07-07 | Improve QoR for Log2 | Andrew Waterman |
| 2016-07-07 | Improve Fill code generation | Andrew Waterman |
| 2016-07-07 | Correct erroneous Log2 documentation | Andrew Waterman |
| 2016-07-07 | Avoid needlessly creating Vecs | Andrew Waterman |
| 2016-06-28 | Merge branch 'master' into renamechisel3 | Jim Lawson |
| 2016-06-27 | Guard firrtl stop, fixing pipelined reset | Andrew Waterman |
| 2016-06-24 | Merge branch 'master' into renamechisel3 | Jim Lawson |
| 2016-06-23 | Expose FIRRTL stop construct | Andrew Waterman |
| 2016-06-22 | Merge branch 'master' into renamechisel3 | Jim Lawson |
| 2016-06-21 | Most of the remaining tests with Module, IO wrapping. | Jim Lawson |
| 2016-06-21 | New Module, IO, Input/Output wrapping. | Jim Lawson |
| 2016-06-20 | make sure MuxCase and MuxLookup can take all subclasses of Data (#222) | Howard Mao |
| 2016-06-20 | Rename "package", "import", and explicit references to "chisel3". | Jim Lawson |
| 2016-06-20 | Rename chisel3 package. | Jim Lawson |
| 2016-06-08 | Move deprecated debug into compatibility | ducky |
| 2016-06-08 | Package split chisel core | ducky |
| 2016-06-08 | Move chisel/... to chisel/core/..., make chisel/compatibility package/folder,... | ducky |
| 2016-06-08 | Move utils into utils | ducky |
| 2016-06-08 | Add implicit xToLiteral, add Element, use internal package object | ducky |
| 2016-06-08 | Rename Chisel -> chisel in tests | ducky |
| 2016-06-08 | Rename packages to lowercase chisel, add compatibility layer | ducky |
| 2016-06-06 | Changed deprecation warning for Data#toBits to recommend asUInt instead becau... | chick |
| 2016-06-01 | Fix a fairly serious bug whereby Vec's could incorrectly compare as equal (#204) | Wesley W. Terpstra |
| 2016-05-31 | Remove unsafe implicit conversions from BitPat | ducky |
| 2016-05-31 | Move BitPat out of core/frontend, add implicit conversion | Ducky |
| 2016-05-26 | Fix type constraint on PriorityMux | Andrew Waterman |
| 2016-05-20 | Merge pull request #186 from ucb-bar/sloc_impl | Richard Lin |
| 2016-05-20 | Implementation of source locators | ducky |
| 2016-05-20 | Update BackendCompilationUtilities.verilogToCpp to specify top-module | jackkoenig |
| 2016-05-12 | remove Tester.scala because chiselMain is now implemented in the chisel-teste... | Danny |
| 2016-05-11 | RegNext and RegInit should match Reg(next=) and Reg(init=) | Andrew Waterman |
| 2016-05-10 | Move emit out of IR | ducky |
| 2016-05-09 | remove vpi source files | Donggyu Kim |
| 2016-05-09 | fix width inference in enum | Donggyu Kim |
| 2016-05-09 | get -> getOrElse | Donggyu Kim |
| 2016-05-05 | Move Chisel API into separate chiselFrontend compilation unit in preparation ... | ducky |
| 2016-05-04 | Multiple assign tester | ducky |
| 2016-05-04 | Remove dependences from Chisel core on Chisel utils | Andrew Waterman |
| 2016-05-04 | Support writing literals like 1.U or -1.S | Andrew Waterman |
| 2016-05-04 | clock|reset to _clock|_reset, added explanatory comment | Stephen Twigg |
