sfcX - Scala FIRRTL Compiler for chiselX

Age	Commit message (Expand)	Author
2016-08-15	Remove stanza (#231)	Adam Izraelevitz
2016-01-28	Updated all tests to pass	azidar
2016-01-16	WIP. Fixed a bunch of tests. Starting on implementing chirrtl, but hit roadbl...	azidar
2016-01-16	New memory works with verilog. Slowly changing tests and fixing bugs.	azidar
2015-08-24	Changed all tests to use verilog backend.	azidar
2015-08-18	Updated shr test so it is an expected pass	azidar
2015-08-17	Added tests for shl and mem. Fixed bug in verilog output of mem size.	azidar
2015-07-31	Updated tests to pipe from stderr to stdout	azidar
2015-07-14	Added tests for clocks. Added remove scope and special chars passes. Added te...	azidar
2015-07-14	Pass most tests. The ones that do not pass are not expected to, yet	azidar
2015-05-18	Big API Change. Pad is no longer supported. Widths of primops can be flexible...	azidar
2015-05-15	Updated firrtl for its passes to be a bit more modular, and to enable pluggin...	azidar
2015-05-01	Bug fix. ExpWidth was improperly evaluated during simplify (not subtracting one)	azidar
2015-04-29	Added dshl and dshr	azidar
2015-04-28	Instances are now male. Reworked lowering pass to be sane. chisel3/ModuleVec....	azidar
2015-04-27	Added on-reset	azidar
2015-04-23	Added new parser. Fixed all Tests. Added on-reset to parser, but don't correc...	azidar
2015-04-22	Switched to stricter primop width constraints. Implemented Pad. Added some mi...	azidar
2015-04-20	Fixed tests to use new execution arguments. Added and fixed chisel3 bugs	azidar
2015-04-17	Fixed bug in primop lowering during type inference. Added reduce instructions...	azidar
2015-04-10	Almost finished width inference, takes too long/infinite loop for gcd	azidar
2015-04-09	Added more 'fake' tests. infer-widths now collects constraints	azidar
2015-04-08	Finished expand whens. started infer widths. added pdf for people to view	azidar