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AgeCommit message (Expand)Author
2016-04-16Add safety to Visitor.visitStmt to first check for TerminalNodejackkoenig
2016-04-15Fix Verilog emission for Modelsim compliationAndrew Waterman
2016-04-14Improve performance of CSE passAndrew Waterman
2016-04-14Factor DCE re-running more cleanlyAndrew Waterman
2016-04-14Add CSE passAndrew Waterman
2016-04-13Extend mux constant propagationAndrew Waterman
2016-04-13Add shift/concat constant propagationAndrew Waterman
2016-04-09Adds check for type of DefRegister initializationjackkoenig
2016-04-09Fix bundle type equalityAdam Izraelevitz
2016-04-08Fixed bug in Remove Accesses where a WSubAccess's index was not checked for a...Adam Izraelevitz
2016-04-08Add small test for issue #105jackkoenig
2016-04-07Add primitive dead code elimination passAndrew Waterman
2016-04-07Split ConstProp pass into own file; propagate lits through nodesAndrew Waterman
2016-04-07Add constant propagation for muxes on UIntAndrew Waterman
2016-04-07Add basic constant propagation for logical operatorsAndrew Waterman
2016-04-07Make ConstProp pass more conciseAndrew Waterman
2016-04-06Merge pull request #102 from ucb-bar/propagate-mem-port-typesAdam Izraelevitz
2016-04-04Wrapped delay in ifndef verilator, as it is not supported by verilatorAdam Izraelevitz
2016-04-01Propagate memory port types in EmitterAndrew Waterman
2016-03-24Fix Chirrtl serialization bugjackkoenig
2016-03-18Add guard to emission of simulation constructsjackkoenig
2016-03-15Change non-reentrant VerilogEmitter from object to classJack
2016-03-15Revamp string literal handlingjackkoenig
2016-03-10Add support for right shift by amount larger than argument widthjackkoenig
2016-03-10Add Module Mappersjackkoenig
2016-03-09Fix StringLit to ignore escaped double quotesdavidbiancolin
2016-03-03Remove unused files: DebugUtils and original Passesjackkoenig
2016-03-03Add some integration tests: successful compilation and executionjackkoenig
2016-03-02Remove implicits from serializejackkoenig
2016-03-01Move mapper functions to implicit methods on IR vertices.jackkoenig
2016-02-26Merge pull request #77 from ucb-bar/separate-serializeJack Koenig
2016-02-25Remove brittle rocket comparison to expected verilog test.jackkoenig
2016-02-25Separate serialize functions into separate filejackkoenig
2016-02-25Remove FlagUtils and related unused debug printingjackkoenig
2016-02-25Remove unused code in Driver, update help messagejackkoenig
2016-02-24Fixed printf bugs in scala and stanza versions. Required special casing print...Adam Izraelevitz
2016-02-24Make rocket.fir regression test fail nicer on consolejackkoenig
2016-02-24Quick fix for printf in the emitted VerilogKamyar Mohajerani
2016-02-23Add rocket regression, just runs rocket.fir through Verilog compiler and comp...Jack
2016-02-23Change FIRRTL Compiler to remove CHIRRTL and Check High FIRRTL FormJack
2016-02-23Stop closing writers in compiler, close in Driver instead (allows others to u...Jack
2016-02-22Change default log-level to warn, users should change manually if so desiredJack
2016-02-22Temporary Fix: get_type on depth=1 memories causing IntWidth(0) typesJack
2016-02-10Re-enable some passesPalmer Dabbelt
2016-02-09Merge branch 'master' of github.com:ucb-bar/firrtlazidar
2016-02-09Added license to FIRRTL filesazidar
2016-02-09Added remaining check passes. Ready for open sourcingazidar
2016-02-09CHIRRTL passes work, parser is updatedazidar
2016-02-09Bug Fixes in handling hyphens as part of IDs, proper handling of negative Int...Jack
2016-02-09Added migrated HighFormCheck to Scala FIRRTL, changes to IR and Utils for get...Jack
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