aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2018-02-27Refactor Annotations (#721)Jack Koenig
- Old Annotation renamed to deprecated LegacyAnnotation - Annotation is now a trait that can be extended - New JsonProtocol for Annotation [de]serialization - Replace AnnotationMap with AnnotationSeq - Deprecate Transform.getMyAnnotations - Update Transforms - Turn on deprecation warnings - Remove deprecated Driver.compile - Make AnnotationTests abstract with Legacy and Json subclasses - Add functionality to convert LegacyAnnotations of built-in annos This will give a noisy warning and is more of a best effort than a robust solution. Fixes #475 Closes #609
2018-02-27Add log-level debug message for modules that get deduped (#748)Jack Koenig
2018-02-26Rename loadAnnotations -> getAnnotations (#747)Jack Koenig
This makes the API change explicit. Also reintroduce loadAnnotations as a deprecated function.
2018-02-23Add graph summation "+" to DiGraph (#744)Schuyler Eldridge
* Add DiGraph sum and DiGraph sum test Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Make DiGraph sum deterministic Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> * Remove ordered hashes/sets from DiGraphTests Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2018-02-22Add tests for #702. Adds Utility functions. Allows clock muxing in FIRRTL, ↵Adam Izraelevitz
but not Emitter. (#717)
2018-02-21Change primop arg type (#587)Adam Izraelevitz
* Changed primops to not accept mixed-type args * Changed return type of sub of two uints to uint * Added negative tests * Removed rocket.fir. Manually changed RocketCore to not mix mul arg types. Added integration tests * Clarified test description and remove println * Fixed use of throwInternalError
2018-02-16Replacematcherror - catch exceptions and convert to internal error. (#424)Jim Lawson
* Catch exceptions and convert to internal error. We need to update the displayed message to incorporate a line number and text to be used for the issue. * Cleanup exception handling/throwing. Re-throw expected (or uncorrectable exceptions). Provide Utils.getThrowable() to get the first (eldest) or last throwable in the chain. Update tests to conform to FreeSpec protocol. * Minor cleanup Admit we've updated some deprecated ScalaTest methods.
2018-02-16Update spec for rhsSchuyler Eldridge
Fixes #450 Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2018-02-12Bump sbt to 1.1.1 and bump plugins (#739)Jack Koenig
Also move all plugins to project/plugins.sbt
2018-02-08CheckHighForm should check that Bits MSB >= LSB (#738)Schuyler Eldridge
Fixes #700 Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2018-02-07Fix EulerTour for circuits with one module (#736)Schuyler Eldridge
A circuit with a single module would fail to properly compute BV RMQs due to a divide by zero bug. This changes the computation of the number of blocks an Euler Tour is broken up into to be, at minimum, one. This also changes one of the test cases ("wire with source and sink in the same module") to exercise this. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2018-02-06Updatefromrelease - Incorporate lessons learned from latest publishing. (#656)Jim Lawson
* Initial 0.1-BETA release. * Update publish clauses. * Bump version after rebuilding with Java 1.7 * Update to current sbt resolver idiom. * Bump version * Revert "Bump version" This reverts commit 37ce060329d437c4494dd1560c1fb8a65a7a0718. * Bump version. * Update installation instructions with sbt publish-local. * set release version * bump release versions * bump SNAPSHOT version * bump version * update deprecated sbt code * Drop pomExtra scm definitions (now generated by git.remoteRepo. * Incorporate lesssons learned from latest publishing. * Bump testing coverage for Scala 2.12 support. * Respond to review requests - unindent changes; unbump plugins version.
2018-02-05Added comments to ExpandWhens (#716)Adam Izraelevitz
2018-01-30Merge pull request #735 from freechipsproject/fix-const-propJack Koenig
Fix Bugs in Constant Propagation
2018-01-30Make Constant Propagation respect dontTouch on registersJack Koenig
2018-01-30Fix bug incorrectly propagating constants on submodule inputsJack Koenig
Two instances of the same module could collide in counting the number of instances of each Module. This could lead to constants being propagated on inputs when it is incorrect to do so. Fixes #734
2018-01-17Add firrtl-mode to README.md (#730)Schuyler Eldridge
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
2018-01-15WiringTransform Refactor (#648)Schuyler Eldridge
Massive refactoring to WiringTransform with the use of a new EulerTour class to speed things up via fast least common ancestor (LCA) queries. Changes include (but are not limited to): * Use lowest common ancestor when wiring * Add EulerTour class with naive and Berkman-Vishkin RMQ * Adds LCA method for Instance Graph * Enables "Two Sources" using "Top" wiring test as this is now valid * Remove TopAnnotation from WiringTransform * Represent WiringTransform sink as `Seq[Named]` * Remove WiringUtils.countInstances, fix imports * Support sources under sinks in WiringTransform * Enable internal module wiring * Support Wiring of Aggregates h/t @edcote fixes #728 Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com> Reviewed-by: Jack Koenig<jack.koenig3@gmail.com>
2018-01-09Update README.mdAdam Izraelevitz
2018-01-08Typo: ExecutionOptionManager -> ExecutionOptionsManager.Leway Colin
2018-01-05Fix FirrtlExecutionOptions backward incompatible change (#704). (#720)Jim Lawson
Fix FirrtlExecutionOptions backward incompatible change (#704). New options should be added to the end of the list to reduce backward compatibility problems. Update comment to mention backwards compatibility issue.
2018-01-05Remove erroneous undef of RANDOMIZE in emitted VerilogJack Koenig
2017-12-29Add support for multiple annotation filesJack
Change loadAnnotations to return annotations instead of mutating firrtlOptions Deprecate implicit annotation file (top.anno) and annotation file override
2017-12-29Actually emit annotations as YAML instead of default toStringJack
2017-12-29Remove option --force-append-anno-file, make defaultJack Koenig
The logic around this option was unintuitive and led to silently dropped annotations.
2017-12-29Add Driver.dramaticWarningJack
2017-12-29Add logger printing for declarations removed by DCEJack Koenig
2017-12-29Add NodeCount analysis for helping with performance debuggingJack Koenig
2017-12-27Removed top preamble (#640)Adam Izraelevitz
2017-12-26Adjust isVCSAvailable commentedwardcwang
2017-12-26Update ISSUE_TEMPLATE.mdAdam Izraelevitz
Updated wording
2017-12-26Update ISSUE_TEMPLATE.mdAdam Izraelevitz
2017-12-24Spec erroneously says mod instead of rem.Paul Rigge
2017-12-22API change: out-of-bounds vec accesses now invalid, not first element (#685)Adam Izraelevitz
[skip formal checks] Generate nicer name for remove accesses
2017-12-20Verify shl/shr amount is > 0 (#710)Jim Lawson
Fixes #527
2017-12-20Fix bug in ConstProp where module dependency edges were dropped (#696)Jack Koenig
This resulted in parent modules sometimes being constant proppagated before a child module. If the child module has a constant driving one of its outputs, the parent module would thus not see the constant. This resulted in strange unstable constant propagation behavior where sometimes constant outputs would not propagate. Also add test illustrating why this occurs with uses of InstanceGraph
2017-12-20Make submodule inputs void in ExpandWhens (#706)Jack Koenig
2017-12-20Add "checker" to the set of Verilog keywords - fixes 455. (#711)Jim Lawson
2017-12-19support -X sverilog to output xxxx.sv file (#638)Wei Song (宋威)
2017-12-19Make toNamed invert serialize (#709)Schuyler Eldridge
Fixes #708
2017-12-18Create ISSUE_TEMPLATE.md (#699)Adam Izraelevitz
2017-12-18Bump sbt (#703)Jack Koenig
Bump SBT to 1.0.4 and update plugins Update Scala versions and sbt commands in .travis.yml Replace run-main with runMain
2017-12-15getBuildDir now builds full pathAdam Izraelevitz
2017-12-12Merge pull request #684 from freechipsproject/remove-wiresJack Koenig
Remove wires, replacing them with nodes
2017-12-12Refactor formal equivalence CI testJack Koenig
Make the check script allow different designs Add FPU, ICache, and RocketCore to regress and use instead of Rob for CI equivalence check
2017-12-12Add RemoveWires transformJack Koenig
This transform replaces all wires with nodes in a legal, flow-forward order
2017-12-12Improve MultiInfo emission, add apply that squashes NoInfoJack Koenig
2017-12-12Make object ConstantPropagation utilsJack Koenig
Move pad to object ConstantPropagation so other transforms can use it
2017-12-12Bump scala and plugins. (#694)Jim Lawson
2017-11-29Add alternative graph IR (#671)Wenyu Tang
* add graph node classes * add graph representation usage pass * remove pass using graph nodes so that firrtl can compile * move google graph ir nodes to altIR package
generated by cgit v1.2.3 (git 2.25.1) at 2026-02-03 12:32:00 +0000