diff options
Diffstat (limited to 'src/test/scala/firrtlTests/execution/VerilogExecution.scala')
| -rw-r--r-- | src/test/scala/firrtlTests/execution/VerilogExecution.scala | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/test/scala/firrtlTests/execution/VerilogExecution.scala b/src/test/scala/firrtlTests/execution/VerilogExecution.scala index fe6e1832..01da57a0 100644 --- a/src/test/scala/firrtlTests/execution/VerilogExecution.scala +++ b/src/test/scala/firrtlTests/execution/VerilogExecution.scala @@ -3,12 +3,11 @@ package firrtlTests.execution import java.io.File - import firrtl._ import firrtl.ir._ - import firrtl.stage.{FirrtlCircuitAnnotation, FirrtlStage} import firrtl.options.TargetDirAnnotation +import firrtl.util.BackendCompilationUtilities._ /** * Mixing in this trait causes a SimpleExecutionTest to be run in Verilog simulation. |