2 files changed, 2 insertions, 3 deletions
diff --git a/src/test/scala/firrtlTests/execution/SimpleExecutionTest.scala b/src/test/scala/firrtlTests/execution/SimpleExecutionTest.scala
index 84872ebe..1842e1e1 100644
--- a/src/test/scala/firrtlTests/execution/SimpleExecutionTest.scala
+++ b/src/test/scala/firrtlTests/execution/SimpleExecutionTest.scala
@@ -3,9 +3,9 @@
 package firrtlTests.execution
 
 import java.io.File
-
 import firrtl.ir._
 import firrtl.testutils._
+import firrtl.util.BackendCompilationUtilities.createTestDirectory
 
 sealed trait SimpleTestCommand
 case class Step(n: Int) extends SimpleTestCommand
diff --git a/src/test/scala/firrtlTests/execution/VerilogExecution.scala b/src/test/scala/firrtlTests/execution/VerilogExecution.scala
index fe6e1832..01da57a0 100644
--- a/src/test/scala/firrtlTests/execution/VerilogExecution.scala
+++ b/src/test/scala/firrtlTests/execution/VerilogExecution.scala
@@ -3,12 +3,11 @@
 package firrtlTests.execution
 
 import java.io.File
-
 import firrtl._
 import firrtl.ir._
-
 import firrtl.stage.{FirrtlCircuitAnnotation, FirrtlStage}
 import firrtl.options.TargetDirAnnotation
+import firrtl.util.BackendCompilationUtilities._
 
 /**
   * Mixing in this trait causes a SimpleExecutionTest to be run in Verilog simulation.