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| author | azidar | 2015-08-25 14:13:00 -0700 |
|---|---|---|
| committer | azidar | 2015-08-25 14:13:13 -0700 |
| commit | eb1ab67b6cc3fd4a549da563bf643bd519d7562e (patch) | |
| tree | a21f0ca828398a33a68f38209429cc6beed86edc /test/errors/width/SmallWidth.fir | |
| parent | 6cd96b6315c32bbf6c4ace28197ff1d4be86a129 (diff) | |
Added width check pass with tests. #22.
Diffstat (limited to 'test/errors/width/SmallWidth.fir')
| -rw-r--r-- | test/errors/width/SmallWidth.fir | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/test/errors/width/SmallWidth.fir b/test/errors/width/SmallWidth.fir new file mode 100644 index 00000000..9e26699e --- /dev/null +++ b/test/errors/width/SmallWidth.fir @@ -0,0 +1,13 @@ +; RUN: firrtl -i %s -o %s.v -X verilog -p ciwT 2>&1 | tee %s.out | FileCheck %s +; CHECK: Width too small for constant "h121". +; CHECK: Width too small for constant "h13333". + +circuit Top : + module Top : + output z : UInt + + z := add(UInt<4>("h121"),UInt<3>("h13333")) + + + + |