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path: root/src/test/scala/chiselTests/CompatibilitySpec.scala
AgeCommit message (Expand)Author
2019-09-13Fix Queue.apply for size 0 in chisel3._ code (#1177)Jack Koenig
2019-07-31Add SInt deprecated compatibility testsSchuyler Eldridge
2019-07-31Add UInt deprecated compatibility testsSchuyler Eldridge
2019-07-31Add Bits deprecated compatibility testsSchuyler Eldridge
2019-07-31Add VecLike deprecated compatibility testsSchuyler Eldridge
2019-07-31Add Wire deprecated compatibility testsSchuyler Eldridge
2019-07-31Add Data deprecated compatibility testsSchuyler Eldridge
2019-07-31Add debug deprecated compatibility testsSchuyler Eldridge
2019-07-31Add Mem/SeqMem deprecated compatibility testsSchuyler Eldridge
2019-07-31Add LFSR16 deprecated compatibility testsSchuyler Eldridge
2019-07-31Add Queue deprecated compatibility testsSchuyler Eldridge
2019-07-31Add Enum deprecated compatibility testsSchuyler Eldridge
2019-07-31Add BitPat deprecated compatibility testsSchuyler Eldridge
2019-07-31Fixup and enable Dummy CompatibilitySpec testSchuyler Eldridge
2019-05-20Repackagecore rebase (#1078)Jim Lawson
2019-03-18Split #974 into two PRs - scalastyle updates (#1037)Jim Lawson
2018-07-19Add support for Input() and Output() (available in Chisel2 since ucb-bar/chis...Jim Lawson
2018-07-10Fix use of read-only refs on rhs of connect in compatibility mode (#854)Jack Koenig
2018-02-20Make Bundle abstract (#774)Jack Koenig
2017-08-17Make Reset a trait (#672)Jack Koenig
2017-08-15Make .dir give correct direction for Module io in compatibilityJack Koenig
2017-08-08Give default direction to children of Vecs in compatibility codeJack Koenig
2017-08-07Don't assign default direction to Analog in Chisel._Jack Koenig
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