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path: root/src/main/scala/chisel3/internal
AgeCommit message (Expand)Author
2022-09-20Use new lazy serialization in FIRRTL (#2741) (#2744)mergify[bot]
2022-01-10Apply scalafmtJack Koenig
2021-08-23Emit .fir lazily, overcomes JVM 2 GiB String limitJack Koenig
2021-08-23Remove chisel3's own firrtl Emitter, use firrtl SerializerJack Koenig
2021-08-18Revert "remove DefRegInit, change DefReg API with option definition. (#1944)"...Jack Koenig
2021-08-17remove DefRegInit, change DefReg API with option definition. (#1944)Jiuyang Liu
2021-07-06Make printf return BaseSim subclass so it can be named/annotated (#1992)Deborah Soung
2021-06-24create and extend annotatable BaseSim class for verification nodes (#1968)Deborah Soung
2021-02-03Remove Deprecated APIs (#1730)Jiuyang Liu
2020-10-01Move Chisel3 to SPDX license conventions (#1604)Chick Markley
2020-07-22Basic model checking API (#1499)Tom Alcorn
2020-07-21Delete outdated scalastyle configuration comments from sourceAlbert Magyar
2020-06-22Remove Driver usage in EmitterSchuyler Eldridge
2020-02-03Add read-under-write parameter to SyncReadMem (#1183)Albert Magyar
2019-10-18Interval Data Type Support for Chisel (#1210)Chick Markley
2019-08-13Add support for asynchronous reset (#1011)Jack Koenig
2019-08-12Aspect-Oriented Programming for Chisel (#1077)Adam Izraelevitz
2019-05-20Repackagecore rebase (#1078)Jim Lawson
2019-04-15Avoid silently truncating BigInt to IntAndrew Waterman
2019-03-18Split #974 into two PRs - scalastyle updates (#1037)Jim Lawson
2019-01-21Unify internal (chisel3.core) and external (chisel3 / chisel3.experimental) M...Richard Lin
2018-10-12Strong enums (#892)Hasan Genc
2018-07-02Direct to FIRRTL (#829)Jack Koenig
2017-10-26Invalidateapi (#645)Adam Izraelevitz
2017-08-17Use firrtl elses in elsewhen/otherwise case emission (#510)Albert Magyar
2017-08-11Rename userDir->specifiedDir (#671)Richard Lin
2017-07-28Black box top-level IO fix (#655)Richard Lin
2017-06-26Directions internals mega-refactor (#617)Richard Lin
2017-04-13Module Hierarchy Refactor (#469)Richard Lin
2017-02-08Add Analog typeJack Koenig
2016-11-21Remove deduplication from Chisel (#347)Donggyu
2016-11-18Add support for parameterized BlackBoxesjackkoenig
2016-11-14Add SourceInfo.makeMessage to better use SourceInfo in error messagesJack
2016-10-12remove trailing whitespace for annotationsScott Beamer
2016-10-06Fix typo in emitted string.Jim Lawson
2016-10-06Breakup the initial emitted string per @ducky64.Jim Lawson
2016-10-06Remove non-standard sbt-buildinfo settings; write buildinfo to firrtl file.Jim Lawson
2016-09-21Make implicit clock name consistent (#288)Andrew Waterman
2016-09-07Fix bug in Printable FullName of submodule portjackkoenig
2016-09-07Add Printable (#270)Jack Koenig
2016-08-25fix a bug in setModNameDonggyu Kim
2016-08-21provides signal name methods for firrtl annotation and chisel testersDonggyu Kim
2016-08-09Support Module name overrides with "override def desiredName"Andrew Waterman
2016-06-20Rename "package", "import", and explicit references to "chisel3".Jim Lawson
2016-06-20Rename chisel3 package.Jim Lawson
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