chiselX - Chisel with SFC compatibility

Age	Commit message (Collapse)	Author
2016-10-19	Change verilogToCpp to use O0	jackkoenig
	This causes Verilator tests to compile faster and use less memory
2016-10-14	Implement a standardized execution scheme for chisel	chick
	Provide support for chisel options Provide support for firrtl options when called as part of chisel compile provide command line support the above options via scopt provide and execution result class that can be used when chisel3 is part of some externally controlled toolchain
2016-10-06	Remove non-standard sbt-buildinfo settings; write buildinfo to firrtl file.	Jim Lawson

2016-10-06	Merge branch 'master' into buildinfo	Jim Lawson

2016-10-06	Update Driver: Check the simulation exit code #281	Jim Lawson
	Merge with master and support checking for failure with an explicit assertion message.
2016-10-05	Print Chisel version when Driver object is created.	Jim Lawson

2016-10-05	Add sbt-buildinfo support.	Jim Lawson

2016-09-01	Move connection implicits from Module constructor to connection methods.	Jim Lawson
	Eliminate builder compileOptions.
2016-08-30	Merge branch 'master' into gsdt	Jim Lawson

2016-08-30	Allow compileOptions as optional arguments to elaborate() and emit().	Jim Lawson

2016-08-30	Correct parameter name (topModule) in ScalaDoc.	Jim Lawson

2016-08-21	provides signal name methods for firrtl annotation and chisel testers	Donggyu Kim
	* signalName: returns the chirrtl name of the signal * pathName: returns the full path name of the signal from the top module * parentPathName: returns the full path of the signal's parent module instance from the top module * parentModName: returns the signal's parent module(not instance) name.
2016-06-28	Merge branch 'master' into renamechisel3	Jim Lawson

2016-06-20	Rename "package", "import", and explicit references to "chisel3".	Jim Lawson

2016-06-20	Rename chisel3 package.	Jim Lawson