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path: root/src/main/scala/Chisel/Driver.scala
AgeCommit message (Collapse)Author
2016-06-08Rename packages to lowercase chisel, add compatibility layerducky
2016-05-20Update BackendCompilationUtilities.verilogToCpp to specify top-modulejackkoenig
This prevents Verilator from erroring when it cannot determine the top-module. It also changes the PRINTF_COND guard to correctly use the top-level reset instead of just the top of the Chisel-generated code.
2016-05-10Move emit out of IRducky
2016-05-09get -> getOrElseDonggyu Kim
2016-04-26Scalastyle fixes and "ignores". - No functional changes.Jim Lawson
2016-03-18Make Chisel self-testing work with new FIRRTL printf/stop guardsjackkoenig
2016-03-14Scalastyle cleanup - no functional differences.Jim Lawson
2016-03-08Added -Wno-WIDTH and -Wno-STMTDLY warning suppressors to verilator commandchick
show verilator command on starndard out Changed --Wno-fatal to -Wno-fatal (double dash became single dash) in accordance with verilator docs println the verilator command to the standard out, so it can be seen along with the various compiler calls
2016-03-05Actually parse "--targetDir"Palmer Dabbelt
I'm trying to get RocketChip to work with Chisel3 again, and we need to run in multiple directories. This fixes the workaround I made earlier to actually parse the passed command-line arguments so I can emit FIRRTL in the correct directory.
2016-02-02Add some Chisel2 driver emulation methodsPalmer Dabbelt
I don't want to have to maintain a big rocket-chip fork to have it run through Chisel3, so instead I'm adding back some of the driver routines that existed in Chisel2.
2016-01-23Move firrtl subpackage to inside internal subpackage.jackkoenig
2015-12-15Print test stdout/stderr to consoleducky
2015-12-09Refactor testharness generation to create directories and have minimal APIducky
2015-12-09Extend TesterDriver to optionally take in additional Verilog sourcesducky
2015-12-06Split internal and FIRRTL packagesducky
2015-11-04Fix new style errorsducky
2015-11-04Remove Parameters library and refactor Driver.Henry Cook
In addition to removing all the extraneous Driver invocations that created various top-level Parameters instances, this commit also lays the groundwork for stanza-firrtl/verilator based testing of Modules that extend BasicTester. The execution-based tests have been updated accordingly. They will only succeed if firrtl and verilator binaries have been installed. Further work is needed on individual tests to use assertions instead of .io.error.
2015-10-20Whitespace / comment style fixesducky
2015-08-27Expose ChiselExceptionsAndrew Waterman
2015-08-13Make error reporting reentrantAndrew Waterman
2015-08-12Marshal the global mutable state into one objectAndrew Waterman
Hopefully, the Chisel core is now thread-safe.
2015-08-05Tighten access to some classes/fieldsAndrew Waterman
2015-08-05Remove stuff from FileSystemUtilitiesAndrew Waterman
2015-08-05Add legacy chiselMain routineAndrew Waterman
2015-08-05Name output files according to ChiselConfig.toStringAndrew Waterman
2015-08-05minor cleanupHenry Cook
2015-08-05Massive Driver simplification, some tweaks to Parameter apiHenry Cook
2015-08-05Remove all references to Backends, only backend is FIRRTLHenry Cook
2015-08-01Compute node directions correctlyAndrew Waterman
2015-07-29Print out basic status information when elaboratingAndrew Waterman
2015-07-24Remove chiselVersion from Makefile; correct bit order for toBits; correct ↵Jim Lawson
Vec() factory signature; Builder.pushCommands in test to avoid empty list head if tester manipulates Chisel nodes.
2015-07-24move source files under Chisel folder - eclipse compatibilityJim Lawson