diff options
| author | Andrew Waterman | 2015-08-13 18:19:01 -0700 |
|---|---|---|
| committer | Andrew Waterman | 2015-08-13 18:19:42 -0700 |
| commit | ac5bf6a4c953fe39fa97d77bc620c515dc9e1622 (patch) | |
| tree | 07ae3cb60765446ba336527c41e571dfb6dca28d /src/main/scala/Chisel/Driver.scala | |
| parent | 178b3ed69661156f4c120c3b0be18d44a5d474af (diff) | |
Make error reporting reentrant
Diffstat (limited to 'src/main/scala/Chisel/Driver.scala')
| -rw-r--r-- | src/main/scala/Chisel/Driver.scala | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/main/scala/Chisel/Driver.scala b/src/main/scala/Chisel/Driver.scala index 682988f8..b1fa831c 100644 --- a/src/main/scala/Chisel/Driver.scala +++ b/src/main/scala/Chisel/Driver.scala @@ -81,11 +81,7 @@ object Driver extends FileSystemUtilities { */ private[Chisel] def elaborateWrappedModule[T <: Module](gen: () => T, p: Parameters, c: Option[ChiselConfig]) { try { - ChiselError.clear() - ChiselError.info("Elaborating design...") val ir = Builder.build(gen()) - ChiselError.info("Done elaborating.") - val name = c match { case None => ir.name case Some(config) => s"${ir.name}.$config" @@ -94,8 +90,8 @@ object Driver extends FileSystemUtilities { createOutputFile(s"$name.cst", p.getConstraints) createOutputFile(s"$name.prm", ir.parameterDump.getDump) createOutputFile(s"$name.fir", ir.emit) - } finally { - ChiselError.report + } catch { + case e: ChiselException => println(e.getMessage) } } def elaborate[T <: Module](gen: () => T): Unit = |
