| Age | Commit message (Collapse) | Author |
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* Promote ChiselEnum user APIs from experimental (#2929)
They are commonly used and if we were ever to change them, we will need
to go through a deprecation process anyway.
Note that the EnumAnnotations remain in chisel3.experimental because,
like all Chisel annotation support, they are slated to be deprecated and
removed.
(cherry picked from commit 424e9446f1675fe0168e22bdfbbe85db997376e6)
# Conflicts:
# docs/src/cookbooks/verilog-vs-chisel.md
# docs/src/explanations/chisel-enum.md
* Maintain binary compatbility, use aliases in chisel3 package
* Deprecate the actual classes in chisel3.experimental
* Also fix backport conflicts
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Co-authored-by: Aditya Naik <aditya.naik@sifive.com>
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* Switch to using experimental trait for OpaqueTypes (#2783)
This makes it more clear that the feature is experimental. Users may
still override the opaqueType method for more dynamic control over when
instances of a given Record are OpaqueTypes or not, but they are
discouraged from doing so.
(cherry picked from commit 7525dc71ccc2050d8e4a68b38f3b76920ba693fc)
* Fix cloneType in RecordSpec
Co-authored-by: Jack Koenig <koenig@sifive.com>
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#2829) (#2831)
* Add Aggregate.elementsIterator and micro-optimize
elementsIterator provides a more efficient API for iterating on the
elements of Aggregates. It is especially useful for Records where
getElements returns a Seq and thus eagerly constructs a new
datastructure which may then just be iterated on anyway.
This new elementsIterator API is then used throughout the codebase where
it makes sense.
Also change Vec.getElements to just return the underlying self instead
of constructing a new Seq.
(cherry picked from commit defa440b349031475daeff4024fad04925cccee6)
# Conflicts:
# core/src/main/scala/chisel3/Aggregate.scala
# core/src/main/scala/chisel3/Module.scala
# core/src/main/scala/chisel3/experimental/Trace.scala
* Move Aggregate.bind inline into Record.bind
Vec overrides bind and does not call the version in Aggregate so the
version in Aggregate is misleading in that its only ever used by
Records. Now there is no version in Aggregate and the actual
functionality and use is more clear.
(cherry picked from commit b054c30ba47026cb2a9b28c696a0a0a58b1e2ee7)
# Conflicts:
# core/src/main/scala/chisel3/Aggregate.scala
* Extract and optimize duplicate checking Record.bind
This replaces an immutable.Map with a single mutable.HashSet and saves
the allocation of # elements Seqs.
(cherry picked from commit 832ea52bc23424bb75b9654422b725a9cafaef40)
# Conflicts:
# core/src/main/scala/chisel3/Aggregate.scala
* Add check for Records that define def elements
(cherry picked from commit a4f223415de19e2a732e0b6a8fe681f706a19a56)
* Resolve backport conflicts
* Make elementsIterator final and package private
* Waive false MiMa failure
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Co-authored-by: Megan Wachs <megan@sifive.com>
(cherry picked from commit 26100a875c69bf56f7442fac82ca9c74ad3596eb)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* Add PartialDataView.supertype (#2826)
This factory method makes it easy to create PartialDataViews from a
Bundle type to its supertype. Because of the typing relationship, there
is no need to provide a mapping between fields. The only thing necessary
is to provide a function for constructing an instance of the supertype
from an instance of the subtype.
(cherry picked from commit 251d454a224e5a961438ba0ea41134d7da7a5992)
# Conflicts:
# core/src/main/scala/chisel3/experimental/dataview/package.scala
# src/test/scala/chiselTests/experimental/DataView.scala
* Resolve backport conflicts
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Add utilities to enable backwards compatibility of the Trace.traceName
API to Chisel 3.5.x. This adds a Trace.traceNameV2 utility which
aliases to Trace.traceName. This also removes the TraceNameAnnotation
and renames it TraceAnnotation. In 3.5.x, traceName will point at
TraceNameAnnotation (which has don't touch behavior) and will be
deprecated telling people to use traceNameV2 which will point at
TraceAnnotation (which does not have don't touch behavior). This will
require fixups to the backport associated with this PR.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
(cherry picked from commit 47b7227e1ac7ccb0d48cefef03510542cc7e157e)
# Conflicts:
# core/src/main/scala/chisel3/experimental/Trace.scala
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
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* Fix traceName module type to RawModule (#2765)
Change the type of modules that the traceName API can be used for from
"Module" to "RawModule". This fixes a bug where this API couldn't be
used for RawModules even though it totally works.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
(cherry picked from commit 74f1c85060cc72ebffe59a49f8d4539a464a4a19)
* Fix binary compatibility issue
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* Add unit test for Issue 2760
* checkpoint: Fix for nested instance
* remove comments about stuff not working
* make the test check the output a little more
* relax the requirement on returning empty ioMap
* Update core/src/main/scala/chisel3/experimental/hierarchy/core/Lookupable.scala
* Update core/src/main/scala/chisel3/Data.scala
* Update core/src/main/scala/chisel3/experimental/hierarchy/core/Lookupable.scala
Co-authored-by: Jack Koenig <koenig@sifive.com>
* Update src/test/scala/chiselTests/experimental/hierarchy/InstanceSpec.scala
Co-authored-by: Jack Koenig <koenig@sifive.com>
* Update core/src/main/scala/chisel3/experimental/hierarchy/core/Lookupable.scala
* Add another unit test which unfortunately still passes
* Update core/src/main/scala/chisel3/Data.scala
* Update src/test/scala/chiselTests/experimental/hierarchy/InstanceSpec.scala
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
(cherry picked from commit 1f9f26dc2bffcb4cc4daf2dc16c5cb455c6769ef)
Co-authored-by: Megan Wachs <megan@sifive.com>
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(#2690)
* Add a cookbook and publicly visible scaladoc for prefix, noPrefix
(cherry picked from commit ae7dc30b3b99f1fbd91c35f54bc19be7c55f74a3)
Co-authored-by: Megan Wachs <megan@sifive.com>
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* Add option to treat warnings as errors (#2676)
Add --warnings-as-errors option
(cherry picked from commit 498946663726955c380a1e420f5d7b9630000aad)
# Conflicts:
# core/src/main/scala/chisel3/experimental/hierarchy/Definition.scala
# core/src/main/scala/chisel3/internal/Builder.scala
# src/main/scala/chisel3/aop/injecting/InjectingAspect.scala
# src/main/scala/chisel3/stage/ChiselOptions.scala
# src/main/scala/chisel3/stage/package.scala
# src/main/scala/chisel3/stage/phases/Elaborate.scala
* Resolve backport conflicts
Co-authored-by: Zachary Yedidia <zyedidia@gmail.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Also remove all non-testing uses of chiselName.
(cherry picked from commit 1c5d1b5317a0c9fe7ef9d15138065a817380a1e4)
Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
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(#2617)
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: Megan Wachs <megan@sifive.com>
(cherry picked from commit 3ab34cddd8b87c22d5fc31020f10ddb2f1990d51)
Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
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Used for separate elaboration of Definition and Instance
(cherry picked from commit 48d57cc8db6f38fdf0e23b7dce36caa404c871b8)
Co-authored-by: Girish Pai <girish.pai@sifive.com>
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* Define leading '_' as API for creating temporaries
Chisel and FIRRTL have long used signals with names beginning with an
underscore as an API to specify that the name does not really matter.
Tools like Verilator follow a similar convention and exclude signals
with underscore names from waveform dumps by default. With the
introduction of compiler-plugin prefixing in Chisel 3.4, the convention
remained but was hard for users to use unless the unnnamed signal
existed outside of any prefix domain. Notably, unnamed signals are most
useful when creating wires inside of utility methods which almost always
results in the signal ending up with a prefix.
With this commit, Chisel explicitly recognizes signals whos val names
start with an underscore and preserve that underscore regardless of any
prefixing. Chisel will also ignore such underscores when generating
prefixes based on the temporary signal, preventing accidental double
underscores in the names of signals that are prefixed by the temporary.
(cherry picked from commit bd94366290886f3489d58f88b9768c7c11fa2cb6)
* Remove unused defaultPrefix argument from _computeName
(cherry picked from commit ec178aa20a830df2c8c756b9e569709a59073554)
# Conflicts:
# core/src/main/scala/chisel3/Module.scala
# core/src/main/scala/chisel3/experimental/hierarchy/ModuleClone.scala
* Resolve backport conflicts
* Waive false positive binary compatibility errors
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* Factor buildName into reusable function
The new function is chisel3.internal.buildName.
(cherry picked from commit 370ca8ac68f6d888dd99e1b9e63f0371add398cf)
* Add --warn:reflective-naming
This new argument (and associated annotation) will turn on a warning
whenever reflective naming changes the name of a signal. This is
provided to help migrate from Chisel 3.5 to 3.6 since reflective naming
is removed in Chisel 3.6.
(cherry picked from commit 97afd9b9a1155fa7cd5cedf19f9e0c15fbe899ec)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(backport #2512) (#2520)
* Support separately elaborating definition and instance in ChiselStage (#2512)
(cherry picked from commit a0aa4d1550e3fbde199a98529cffeb176fb4bed8)
# Conflicts:
# core/src/main/scala/chisel3/experimental/hierarchy/Definition.scala
# core/src/main/scala/chisel3/experimental/hierarchy/Instance.scala
# core/src/main/scala/chisel3/internal/Builder.scala
* fixing imports (#2522)
Co-authored-by: Deborah Soung <debs@sifive.com>
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(backport #2476) (#2479)
* Capture 1:1 mappings of Aggregates inside of views
This is implemented by including any corresponding Aggregates from the
DataView.mapping in the AggregateViewBinding.childMap (which is now of
type Map[Data, Data]).
This enables dynamically indexing Vecs that are themselves elements of
larger Aggregates in views when the corresponding element of the view is
a Vec of the same type. It also increases the number of cases where a
single Target can represent part of a view.
(cherry picked from commit 1f6b1ca14ccf86918065073c3f6f3626dd83a68e)
* Add FlatIO API for creating ports from Bundles without a prefix
(cherry picked from commit 772a3a1fe3b9372b7c2d7cd2d424b2adcd633cdb)
* [docs] Add FlatIO to the general cookbook
(cherry picked from commit b4159641350f238f0f899b69954142ce8ee11544)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Chisel <> semantics differ somewhat from FIRRTL <= semantics,
so we only emit <= when it would be legal. Otherwise we continue
the old behavior of emitting a connection for every leaf-level
Element.
Co-authored-by: Deborah Soung <debs@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 3553a1583403824718923a6cc530cec3b38f5704)
Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Also delete an errant println in InstanceSpec
(cherry picked from commit 3462c54c018a52a377f1c89121b6ed99c5b0ae1d)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(cherry picked from commit 2a985ac376698a2e6300fbee13001d82d3e13989)
Co-authored-by: Deborah Soung <debs@sifive.com>
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(cherry picked from commit 024847d75079a125e5946e9dcf2ed9c14d2db730)
Co-authored-by: Megan Wachs <megan@sifive.com>
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* Improve error reporting (#2376)
* Do not trim stack traces of exceptions with no stack trace
This prevents us from accidentally giving stack traces to exceptions
that don't have them and giving misleading messages telling users to use
--full-stacktrace when it won't actually do anything.
Also deprecate ChiselException.chiselStackTrace which is no longer being
used anywhere in this codebase.
* Add exception class for multiple-errors reported
New chisel3.internal.Errors replaces old anonymous class that would show
up as chisel3.internal.ErrorLog$$anon$1 in error messages.
* Add new option --throw-on-first-error
This tells Chisel not to aggregate recoverable errors but instead to
throw an exception on the first one. This gives a stack trace for users
who need it for debugging.
(cherry picked from commit ff2e9c92247b3848659fa09fdd53ddde2120036a)
* Waive MiMa false positives
The waived change is to a package private constructor.
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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* Add Lookupable for Either
* Lookupable: enhance the @public/@instantiable error message to include traits and Eithers
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Command:
sbt scalafmtAll
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* New Feature: Add a Select.ios that works with Definition/Instance
* BugFix: isA now truly ignores type parameters
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* DataProducts for Seq and Tuple2-10 in DataProduct companion object
* DataViews for Seq and Tuple 2-10 in DataView companion object
* HWTuple2-10 Bundles in chisel3.experimental
* Implicit conversions from Seq to Vec and Tuple to HWTuple in chisel3.experimental.conversions
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Provides a more intuitive implementation of toString for Data.
Utilizes the fact that the compiler plugin provides names earlier than
Chisel had in the past so we can accurately guess the name of
signals even in the currently elaborating module.
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <jack.koenig3@gmail.com>
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* Bugfix - definition name index skipping with D/I
* Add tests to DefinitionSpec
* Add failing test
* Fix failing test
* Update core/src/main/scala/chisel3/internal/Builder.scala
Co-authored-by: Jack Koenig <jack.koenig3@gmail.com>
* whitespace
* revert package private val
Co-authored-by: Jack Koenig <jack.koenig3@gmail.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
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Exposing more internals of D/I, which are required for supporting D/I with more powerful Chisel libraries:
- Exposing IsClone[_]
- Exposing InstantiableClone[_]
- Gated builders for Instance/Definition
- Unsealing Lookupable, with protected accessors for proto and cloned
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* Add Hierarchy trait
* Add Hierarchy trait
* Add Hierarchy scaladoc
* Add license
* Add isA and tests
* Add back isA
* Add new Select APIs for hierarchy package
* Update scaladoc
* Write outlines for tests
* Add tests and fixes to new Select functions
* Make calculate via lazy val
* Apply suggestions from code review
Co-authored-by: Megan Wachs <megan@sifive.com>
* Apply suggestions from code review
Co-authored-by: Megan Wachs <megan@sifive.com>
* Clean up scaladoc
* Add shouldNot compile
* Apply suggestions from code review
Co-authored-by: Megan Wachs <megan@sifive.com>
* Bugfix all funcs should analyze root too
* Add mdoc, bugfix toDefinition
* Make func private, add scaladoc
* Update src/test/scala/chiselTests/experimental/hierarchy/InstanceSpec.scala
Co-authored-by: Jack Koenig <koenig@sifive.com>
* Made protected vals private
* Apply suggestions from code review
Co-authored-by: Jack Koenig <koenig@sifive.com>
* Address code review comments
* Added additional null check
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* Add Hierarchy trait
* Add Hierarchy trait
* Add Hierarchy scaladoc
* Add license
* Add isA and tests
* Add back isA
* Make calculate via lazy val
* Apply suggestions from code review
Co-authored-by: Megan Wachs <megan@sifive.com>
* Add shouldNot compile
* Update src/test/scala/chiselTests/experimental/hierarchy/InstanceSpec.scala
Co-authored-by: Jack Koenig <koenig@sifive.com>
* Made protected vals private
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Definition/Instance introduced the need for representing the targets of
instances as InstanceTargets. This original implementation changed the
return type of BaseModule.toTarget to express this need. This is a
backwards incompatible change that is actually unnecessary because it is
impossible for users to get references to the internal InstanceClone
objects, instead only accessing such modules via Instance[_] wrappers
and cloned Data. We restored the old API by adding a new internal method
"getTarget" which will give the correct targets for InstanceClones while
maintaining the API of BaseModule.toTarget.
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This introduces a new experimental API for module instantiation that disentagles
elaborating the definition (or implementation) from instantiation of
a given module. This solves Chisel's longstanding reliance on
"Deduplication" for generating Verilog with multiple instances of the
same module.
The new API resides in package chisel3.experimental.hierarchy. Please
see the hierarchy ScalaDoc, documentation, and tests for examples of
use.
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
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DataView is a mechanism for "viewing" Scala objects as a subtype of
`Data`. Often, this is useful for viewing one subtype of `Data`, as
another. One can think about a DataView as a cross between a
customizable cast and an untagged union.
A DataView has a Target type `T`, and a View type `V`. DataView requires
that an implementation of `DataProduct` is available for Target types.
DataProduct is a type class that provides a way to iterate on `Data`
children of objects of implementing types.
If a DataView is provided for a type T to a type V, then the function
.viewAs[V] (of type T => V) is available. The object (of type T) returned
by .viewAs is called a "View" and can be used as both an rvalue and an
lvalue. Unlike when using an .asTypeOf cast, connecting to a "View" will
connect to the associated field or fields of the underlying Target.
DataView also enables .viewAsSupertype which is available for viewing
Bundles as a parent Bundle type. It is similar to .viewAs but requires
a prototype object of the Target type which will be cloned in order to
create the returned View. .viewAsSupertype maps between the
corresponding fields of the parent and child Bundle types.
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* prototype annotating verif constructs
* switch to final class
* name emissions
* moving BaseSim to experimental
* adding name tests
* fixing quotation escapes
* emitting names, but everything has a default name
* only name things with provided/suggested names
* name every BaseSim node
* removing msg, unused imports
* fixing file exist calls
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This PR provides for support for Vec literals. They can be one of two forms
Inferred:
```
Vec.Lit(0x1.U, 0x2.U)
```
or explicit:
```
Vec(2, UInt(4.W)).Lit(0 -> 0x1.U, 1 -> 0x2.U)
```
- Explicit form allows for partial, or sparse, literals.
- Vec literals can be used as Register initializers
- Arbitrary nesting (consistent with type constraints is allowed)
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* Handle MemTypeBinding in Analog
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
* Fix stack trace trimming across ChiselStage
Fix bug in stack trace trimming behavior. Now, the following is what
happens:
1. The Builder, if catching accumulated errors, will now throw a
ChiselException with a Scala-trimmed Stack trace. Previously, this
would throw the full excpetion.
2. The Elaborate phase handles stack trace trimming. By default, any
Throwable thrown during elaboration will have its stack
trace *mutably* trimmed and is rethrown. A logger.error is printed
stating that there was an error during elaboration and how the user
can turn on the full stack trace. If the --full-stacktrace option
is on, then the Throwable is not caught and only the first
logger.error (saying that elaboration failed) will be printed.
3. ChiselStage (the class), ChiselStage$ (the object), and ChiselMain
all inherit the behavior of (2).
Mutable stack trace trimming behavior is moved into an implicit
class (previously this was defined on ChiselException only) so this
can be applied to any Throwable.
No StageErrors are now thrown anymore. However, StageErrors may still
be caught by ChiselMain (since it is a StageMain).
Testing is added for ChiselMain, ChiselStage, and ChiselStage$ to test
all this behavior.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
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No longer create a pointer from parent to every HasId, only do it by
default for BaseModules and MemBases. Add pointer from parent to Data
upon binding the Data.
* Add MemTypeBinding for port types of Mems
This binding is similar to the SampleElementBinding for Vecs in that
these Data are not truly hardware, but are represented in the FIRRTL IR
and thus need some representation.
* Call _onModuleClose on unbound Records
This maintains some corner-case behavior that is nevertheless relied
upon. It ensures that refs are set for the elements of Records, even if
they are not bound to any real hardware.
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Change source and other relevant files to use SPDX license
LICENSE file moved from src/ to ./
Changed license file to refer to this per recommendation
using_spdx_license_list_short_identifiers
WARNING: Tests fail with as of yet undiagnosed error
```
[error] Failed: Total 691, Failed 19, Errors 0, Passed 672, Ignored 15
[error] Failed tests:
[error] chiselTests.QueueSpec
[error] examples.VendingMachineGeneratorSpec
[error] chiselTests.HarnessSpec
[error] chiselTests.ConnectSpec
[error] chiselTests.aop.SelectSpec
[error] chiselTests.PopCountSpec
[error] chiselTests.CloneModuleSpec
[error] (Test / test) sbt.TestsFailedException: Tests unsuccessful
[error] Total time: 379 s (06:19), completed Sep 30, 2020 12:38:17 AM
sbt:chisel3>
```
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* Added documentation. Bugfix in plugin. Moved plugin APIs to separate package
* Revert reg naming behavior (omit underscore)
* Added documentation and a test
* Addressed reviewer feedback.
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Added prefixing and a compiler plugin to improve naming. Only works for Scala 2.12 and above.
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* Add `check(...)` affordance
* Add assert (renamed from check and fixed)
* Add verification statements
* Move formal to experimental.verification
* Make test use ChiselStage
`generateFirrtl` has been cut from Chisel
* Fix newly introduced style warnings
* Fix some old style warnings for good measure
* Revert "Fix some old style warnings for good measure"
This reverts commit 31d51726c2faa4c277230104bd469ff7ffefc890.
* Cut scalastyle comments
* Cut formal delimiter comments
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