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authorKevin Laeufer2021-09-23 11:12:26 -0700
committerGitHub2021-09-23 18:12:26 +0000
commitd1d38bd096fce8b92468720fbedc835ecda40e6b (patch)
treee41c8ea472ba012214d1816afb4e4d595f9aaf67 /core/src/main/scala/chisel3/experimental
parent810f3cdffcb7acc6b7e41e070fb956987aee3806 (diff)
make all verification statements publically available (#2089)
Diffstat (limited to 'core/src/main/scala/chisel3/experimental')
-rw-r--r--core/src/main/scala/chisel3/experimental/package.scala5
-rw-r--r--core/src/main/scala/chisel3/experimental/verification/package.scala60
2 files changed, 0 insertions, 65 deletions
diff --git a/core/src/main/scala/chisel3/experimental/package.scala b/core/src/main/scala/chisel3/experimental/package.scala
index 8018159f..0fc79487 100644
--- a/core/src/main/scala/chisel3/experimental/package.scala
+++ b/core/src/main/scala/chisel3/experimental/package.scala
@@ -166,9 +166,4 @@ package object experimental {
val prefix = chisel3.internal.prefix
// Use to remove prefixes not in provided scope
val noPrefix = chisel3.internal.noPrefix
-
- /** Base simulation-only component. */
- abstract class BaseSim extends NamedComponent {
- _parent.foreach(_.addId(this))
- }
}
diff --git a/core/src/main/scala/chisel3/experimental/verification/package.scala b/core/src/main/scala/chisel3/experimental/verification/package.scala
deleted file mode 100644
index 190083fd..00000000
--- a/core/src/main/scala/chisel3/experimental/verification/package.scala
+++ /dev/null
@@ -1,60 +0,0 @@
-// SPDX-License-Identifier: Apache-2.0
-
-package chisel3.experimental
-
-import chisel3._
-import chisel3.internal.Builder
-import chisel3.internal.firrtl.{Formal, Verification}
-import chisel3.internal.sourceinfo.SourceInfo
-
-package object verification {
-
- object assert {
- /** Named class for assertions. */
- final class Assert(private[chisel3] val predicate: Bool) extends BaseSim
-
-
- def apply(predicate: Bool, msg: String = "")(
- implicit sourceInfo: SourceInfo,
- compileOptions: CompileOptions): Assert = {
- val a = new Assert(predicate)
- when (!Module.reset.asBool) {
- val clock = Module.clock
- Builder.pushCommand(Verification(a, Formal.Assert, sourceInfo, clock.ref, predicate.ref, msg))
- }
- a
- }
- }
-
- object assume {
- /** Named class for assumes. */
- final class Assume(private[chisel3] val predicate: Bool) extends BaseSim
-
- def apply(predicate: Bool, msg: String = "")(
- implicit sourceInfo: SourceInfo,
- compileOptions: CompileOptions): Assume = {
- val a = new Assume(predicate)
- when (!Module.reset.asBool) {
- val clock = Module.clock
- Builder.pushCommand(Verification(a, Formal.Assume, sourceInfo, clock.ref, predicate.ref, msg))
- }
- a
- }
- }
-
- object cover {
- /** Named class for covers. */
- final class Cover(private[chisel3] val predicate: Bool) extends BaseSim
-
- def apply(predicate: Bool, msg: String = "")(
- implicit sourceInfo: SourceInfo,
- compileOptions: CompileOptions): Cover = {
- val clock = Module.clock
- val c = new Cover(predicate)
- when (!Module.reset.asBool) {
- Builder.pushCommand(Verification(c, Formal.Cover, sourceInfo, clock.ref, predicate.ref, msg))
- }
- c
- }
- }
-}