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| author | Albert Magyar | 2020-07-20 12:11:44 -0700 |
|---|---|---|
| committer | Albert Magyar | 2020-07-21 13:06:53 -0700 |
| commit | 7e9f424fb7dcd11c894ceb9f6f049fd9eda80632 (patch) | |
| tree | 1fa15e357d0af7b82316fa2ee659e2e98118488c /src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala | |
| parent | 4a0e828cfe76e0d3bd6c4a0cc593589fe74ed0ba (diff) | |
Delete outdated scalastyle configuration comments from source
Diffstat (limited to 'src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala')
| -rw-r--r-- | src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala b/src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala index 3d14b5c2..92bfcde7 100644 --- a/src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala +++ b/src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala @@ -123,7 +123,6 @@ object loadMemoryFromFile { * Currently the only non-Verilog based simulation that can support loading memory from a file is treadle but it does * not need this transform to do that. */ -//scalastyle:off method.length class LoadMemoryTransform extends Transform { def inputForm: CircuitForm = LowForm def outputForm: CircuitForm = LowForm |