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Diffstat (limited to 'src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala')
| -rw-r--r-- | src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala b/src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala index 3d14b5c2..92bfcde7 100644 --- a/src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala +++ b/src/main/scala/chisel3/util/experimental/LoadMemoryTransform.scala @@ -123,7 +123,6 @@ object loadMemoryFromFile { * Currently the only non-Verilog based simulation that can support loading memory from a file is treadle but it does * not need this transform to do that. */ -//scalastyle:off method.length class LoadMemoryTransform extends Transform { def inputForm: CircuitForm = LowForm def outputForm: CircuitForm = LowForm |