diff options
| author | Jim Lawson | 2019-03-18 12:17:33 -0700 |
|---|---|---|
| committer | GitHub | 2019-03-18 12:17:33 -0700 |
| commit | 2c449c5d6e23dcbb60e8c64cab6b6f4ba6ae313f (patch) | |
| tree | 3daffa8eb0f57faf31d3977700be38f5be31e59a /chiselFrontend/src/main/scala/chisel3/core/Module.scala | |
| parent | cfb2f08db9d9df121a82f138dd71297dbcea66cc (diff) | |
Split #974 into two PRs - scalastyle updates (#1037)
* Update style warnings now that subprojects are aggregated.
Use "scalastyle-test-config.xml" for scalastyle config in tests.
Enable "_" in method names and accept method names ending in "_=".
Re-sync scalastyle-test-config.xml with scalastyle-config.xml
* Remove bogus tests that crept in with git add
* Add missing import.
Diffstat (limited to 'chiselFrontend/src/main/scala/chisel3/core/Module.scala')
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/core/Module.scala | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Module.scala b/chiselFrontend/src/main/scala/chisel3/core/Module.scala index 751d5401..0a5e522f 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Module.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Module.scala @@ -204,14 +204,14 @@ abstract class BaseModule extends HasId { /** Desired name of this module. Override this to give this module a custom, perhaps parametric, * name. */ - def desiredName = this.getClass.getName.split('.').last + def desiredName:String = this.getClass.getName.split('.').last /** Legalized name of this module. */ final lazy val name = try { Builder.globalNamespace.name(desiredName) } catch { case e: NullPointerException => throwException( - s"Error: desiredName of ${this.getClass.getName} is null. Did you evaluate 'name' before all values needed by desiredName were available?", e) + s"Error: desiredName of ${this.getClass.getName} is null. Did you evaluate 'name' before all values needed by desiredName were available?", e) // scalastyle:ignore line.size.limit case t: Throwable => throw t } @@ -272,7 +272,7 @@ abstract class BaseModule extends HasId { * * TODO: remove this, perhaps by removing Bindings checks in compatibility mode. */ - def _compatAutoWrapPorts() {} + def _compatAutoWrapPorts() {} // scalastyle:ignore method.name // // BaseModule User API functions @@ -285,7 +285,7 @@ abstract class BaseModule extends HasId { /** Chisel2 code didn't require the IO(...) wrapper and would assign a Chisel type directly to * io, then do operations on it. This binds a Chisel type in-place (mutably) as an IO. */ - protected def _bindIoInPlace(iodef: Data): Unit = { + protected def _bindIoInPlace(iodef: Data): Unit = { // scalastyle:ignore method.name // Compatibility code: Chisel2 did not require explicit direction on nodes // (unspecified treated as output, and flip on nothing was input). // This sets assigns the explicit directions required by newer semantics on @@ -334,7 +334,7 @@ abstract class BaseModule extends HasId { * TODO(twigg): Specifically walk the Data definition to call out which nodes * are problematic. */ - protected def IO[T<:Data](iodef: T): T = chisel3.core.IO.apply(iodef) + protected def IO[T<:Data](iodef: T): T = chisel3.core.IO.apply(iodef) // scalastyle:ignore method.name // // Internal Functions @@ -344,7 +344,7 @@ abstract class BaseModule extends HasId { private[chisel3] var _component: Option[Component] = None /** Signal name (for simulation). */ - override def instanceName = + override def instanceName: String = if (_parent == None) name else _component match { case None => getRef.name case Some(c) => getRef fullName c |
