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write mport declaration
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to be specified with write and rdwr mports
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roadblock in assigning clocked ports
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Decided to not have Conditionally in low firrtl - instead, Print and
Stop have enables
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emitting ports (and the assignments to them)
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Lower Types pass. #53
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Change of FIRRTL semantics!
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Assignments to a register are no longer affected by enclosing when
statements:
when p :
reg r : UInt,clk,reset
r := a
will lower to:
reg r : UInt,clk,reset
r := a
instead of:
reg r : UInt,clk,reset
when p : r := a
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catching of initialization of accessors. Missing use case of accessing an accessor. Still need to update tests to pass
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conditional assignment
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Updated tests to match. #29.
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extract, not >>
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an optimization that eliminated some when statements.
Added test case.
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invalid <> assignments.
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indexed. Fixed various broken tests.
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tests. Made more tests pass
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