sfcX - Scala FIRRTL Compiler for chiselX

Age	Commit message (Expand)	Author
2016-08-15	Remove stanza (#231)	Adam Izraelevitz
2016-01-28	Fixed bug and updated test for changing mod to rem	azidar
2016-01-28	Updated all tests to pass	azidar
2016-01-17	BIT-AND, BIT-OR, and BIT-XOR now can accept SInts. Fixed tests	azidar
2016-01-16	Fixed all tests so they either pass are marked as expected failures	azidar
2016-01-16	New memory works with verilog. Slowly changing tests and fixing bugs.	azidar
2015-09-30	Fixed naming bug where __1 was matching. Caused lots o issues.	azidar
2015-08-18	Fixed so its length is greater than what it connects to. Changed shr to be e...	azidar
2015-08-04	Added check for reading from outputs with flips	azidar
2015-08-03	Fixed performance bug in Split Expressions. Changed delin for connect indexed...	azidar
2015-07-31	Updated tests to pipe from stderr to stdout	azidar
2015-07-30	Added eqv for bitwise equality, and change eq to be arithmetic equality	azidar
2015-07-14	Added tests for clocks. Added remove scope and special chars passes. Added te...	azidar
2015-05-18	Big API Change. Pad is no longer supported. Widths of primops can be flexible...	azidar
2015-05-15	Updated firrtl for its passes to be a bit more modular, and to enable pluggin...	azidar
2015-04-29	Added dshl and dshr	azidar
2015-04-23	Added new parser. Fixed all Tests. Added on-reset to parser, but don't correc...	azidar
2015-04-20	Fixed tests to use new execution arguments. Added and fixed chisel3 bugs	azidar
2015-04-17	Fixed bug in primop lowering during type inference. Added reduce instructions...	azidar
2015-03-04	Finished infer-types pass	azidar
2015-03-03	In-progress, working on inferring types pass	azidar
2015-02-25	Added debug print statements to dump fields from nodes, and updated tests to ...	azidar
2015-02-24	Rewrote README to include installation instructions and stanza justification....	azidar
2015-02-24	Updated tests, and included a check for the name of the pass, which	azidar