| Age | Commit message (Expand) | Author |
|---|
| 2016-01-16 | Fixed inline-indexers bug where genders weren't properly calculated in | azidar |
| 2016-01-16 | Moved integer declaration inside module to be verilog (not system-verilog) co... | Adam Izraelevitz |
| 2016-01-16 | Stop now emits correct verilog to stop simulation, required passing a string ... | azidar |
| 2016-01-16 | Fixed bug in printf and stop to correctly print to STDERR | azidar |
| 2016-01-16 | Finished adding clocks to Stop and Print | azidar |
| 2015-12-11 | Added LoFirrtl compiler, can be called with -X lofirrtl | azidar |
| 2015-11-02 | Deleted extranous passes.stanza comments, updated standard passes. Added supp... | jackkoenig |
| 2015-10-30 | Added support for -b <backend> so that specific passes can be run then a back... | jackkoenig |
| 2015-10-14 | Don't emit SystemVerilog keywords | Andrew Waterman |
| 2015-10-07 | Added Printf and Stop to firrtl. #23 #24. | azidar |
| 2015-10-06 | Merge pull request #45 from ucb-bar/change-mem-type | Adam Izraelevitz |
| 2015-10-01 | Merge pull request #43 from ucb-bar/new-semantics | Andrew Waterman |
| 2015-10-01 | Changed DefMemory to be a non-vector type with a size member. Necessary for A... | azidar |
| 2015-10-01 | Change of FIRRTL semantics! | azidar |
| 2015-09-30 | Moved To-Real-Ir earlier, so CheckWidth could happen before PadWidth | azidar |
| 2015-09-30 | Fixed naming bug where __1 was matching. Caused lots o issues. | azidar |
| 2015-09-29 | Fixed final bug. All tests pass. Accessors are a go. | azidar |
| 2015-09-29 | Added DecToIndexer/DecFromIndexer. Fixed most use cases of incorrect catching... | azidar |
| 2015-08-31 | Sped up low form check by not checking the type of every expression, as it is... | azidar |
| 2015-08-28 | Moved check type and check kind after check gender | azidar |
| 2015-08-26 | Fixed bug where subfields weren't entirely removed | azidar |
| 2015-08-26 | Fixed bug where firrtl was incorrectly judging the width of a bigint. #36 #37. | azidar |
| 2015-08-25 | Fix Verilog backend for mixed signed-unsigned ops | Andrew Waterman |
| 2015-08-25 | Fixed bug in split expression that leaked connect statements out of a conditi... | azidar |
| 2015-08-25 | Removed IntWidth, now only use LongWidth. Now do width inference for Constant... | azidar |
| 2015-08-25 | Added width check pass with tests. #22. | azidar |
| 2015-08-24 | Temporarily deprecated the flo backend until I fix it | azidar |
| 2015-08-24 | Added BigInt error if passed a string without starting with a b or h | azidar |
| 2015-08-20 | Added tests, cleaned up repo | azidar |
| 2015-08-20 | Added Poison node. Includes tests. #26. | azidar |
| 2015-08-20 | Added rsh to BigInt library. Const Prop now works on rsh's on constants. #19. | azidar |
| 2015-08-20 | Fixed bigint library to correctly extract bits from UIntValue. #19. | azidar |
| 2015-08-19 | Added beginning of constant propagation pass, doesn't work | azidar |
| 2015-08-19 | Switched to new bigint library | azidar |
| 2015-08-19 | Check Neg UInt in the parser | azidar |
| 2015-08-19 | Fixed width inference bug where constraints were propagating backwards. | azidar |
| 2015-08-18 | Fixed width inference for static shift left, #18 | azidar |
| 2015-08-18 | Fixed verilog emission from rand to random | azidar |
| 2015-08-18 | Fixed bug in MinusWidth where it was adding instead of subtracting widths | azidar |
| 2015-08-18 | Fixed so its length is greater than what it connects to. Changed shr to be e... | azidar |
| 2015-08-18 | Emit random initialization instead of zero initialization for Verilog reg | azidar |
| 2015-08-17 | Removed leading zeros from UInt constants | azidar |
| 2015-08-17 | Fixed bug where equality between expressions was incorrect, leading to | azidar |
| 2015-08-17 | Added tests for shl and mem. Fixed bug in verilog output of mem size. | azidar |
| 2015-08-05 | Added type inference before gender check | azidar |
| 2015-08-05 | Fixed bug in temp elimination. | azidar |
| 2015-08-04 | Added check for reading from outputs with flips | azidar |
| 2015-08-04 | Added () around width printers | azidar |
| 2015-08-04 | Added verilog keywords to uniquify them | azidar |
| 2015-08-04 | Fixed reading from instance's input ports. Fixed unique naming bug. | azidar |
