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Scala FIRRTL Compiler for chiselX
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Author
2020-03-30
Don't use postfix operator in transforms.Flatten
Schuyler Eldridge
2020-03-26
Eliminate warnings on `sbt doc` and `sbt unidoc` (#1470)
Chick Markley
2020-03-17
Add method to CheckCompLoops which returns its full netlist (#1458)
David Biancolin
2020-03-12
Add Support for FPGA Bitstream Preset-registers (#1050)
John's Brew
2020-03-11
Don't const-prop a register's self-init (#1441)
Albert Magyar
2020-03-11
Migrate to DependencyAPI
Schuyler Eldridge
2020-03-09
Provide an annotation mix-in that marks RTs as dontTouch (#1433)
David Biancolin
2020-03-04
Incorporate new AddNot formal regression test
Albert Magyar
2020-03-04
Revert "Verilog emitter transform InlineNots (#1270)"
Albert Magyar
2020-02-18
Remove last connect semantics from reset inference (#1396)
Jack Koenig
2020-02-13
Constant prop binary PrimOps with matching arguments
Albert Magyar
2020-02-12
Fixing lint error: x + -1 (#1374)
Adam Izraelevitz
2020-02-07
Refactor handling of reg const prop entries to cover more cases
Albert Magyar
2020-02-06
Better register const prop through speculative de-optimization
Albert Magyar
2020-02-06
Add constant prop to async regs (#1355)
Adam Izraelevitz
2020-02-03
Dedup: check if moduleOpt exists before getting (#1323)
Albert Chen
2020-01-20
clean up warnings: trim unused imports (#1315)
John Ingalls
2020-01-15
Verilog emitter transform InlineBitExtractions (#1296)
John Ingalls
2020-01-07
Fix literals cast to Clocks in Print and Stop
Jack Koenig
2020-01-07
Remove unnecessary $signed casts for PrimOps in Verilog Emitter
Jack Koenig
2020-01-07
Remove unnecessary casts in Constant Propagation
Jack Koenig
2020-01-06
Verilog emitter transform InlineNots (#1270)
John Ingalls
2019-12-30
Minor code cleansup in InferResets
Jack Koenig
2019-12-30
Respect last connect semantics in InferResets
Jack Koenig
2019-11-04
Ignore extmodule instances in Flatten (#1218)
Albert Magyar
2019-10-24
Enhance CheckCombLoops errors with connection info
Albert Magyar
2019-10-08
Make TopWiringTransform idempotent
Schuyler Eldridge
2019-10-07
Absorb some instance analysis into InstanceGraph, use safer boxed Strings (#1...
Albert Magyar
2019-09-16
Rename gender to flow
Schuyler Eldridge
2019-09-12
Add space, s/Github/GitHub/ in DontTouchException (#1177)
Schuyler Eldridge
2019-09-05
Filter out more filename extensions for blackbox source headers (#1134)
Albert Magyar
2019-08-19
Refactor exceptions to remove stack trace from user errors (#1157)
Jack Koenig
2019-08-13
Infer reset (#1068)
Jack Koenig
2019-08-07
Improve RemoveReset handling of invalid inits
Schuyler Eldridge
2019-07-30
Fix "since" deprecation, should be "1.2" not "1.3" (#1139)
Schuyler Eldridge
2019-07-25
Allow name of blackbox resource .f file to change from static value (#1129)
Albert Magyar
2019-07-24
Add ExpandConnects to TopWiringTransform fixup (#1135)
Schuyler Eldridge
2019-07-23
more constprop on muxes (#1052)
Donggyu Kim
2019-07-19
Add SimplifyMems transform to lower memories without splitting (#1111)
Albert Magyar
2019-07-08
Remove some warnings (#1118)
Leway Colin
2019-06-28
Remove deprecated ComponentName from CombinationalPath annotation (#1107)
Albert Magyar
2019-06-18
Use scalafix to remove unused import and deprecated procedure syntax (#1074)
Leway Colin
2019-05-09
Bugfix: GroupComponents (#1082)
Adam Izraelevitz
2019-05-04
Add register init to RemoveWires dependencies (#1078)
Schuyler Eldridge
2019-04-29
Update NoCircuitDedupAnnotation so it's available from firrtl.stage.FirrtlMain
Jim Lawson
2019-04-25
Add ShellOption, DeletedWrapper
Schuyler Eldridge
2019-03-29
Faster reg constprop (#1067)
Albert Magyar
2019-03-26
DCE printf and stop statements with constant-0 enables
Andrew Waterman
2019-02-27
Add --nodedup option to facilitate FIRRTL to verilog regression testing. (#1035)
Jim Lawson
2019-02-25
Fix almost all Scaladoc warnings
Schuyler Eldridge
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