Fix almost all Scaladoc warnings

This fixes all Scaladoc warnings except for those trying to link to
Java.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

5 files changed, 42 insertions, 42 deletions

diff --git a/src/main/scala/firrtl/transforms/CheckCombLoops.scala b/src/main/scala/firrtl/transforms/CheckCombLoops.scala
index 9016dca4..0a9ec0e3 100644
--- a/src/main/scala/firrtl/transforms/CheckCombLoops.scala
+++ b/src/main/scala/firrtl/transforms/CheckCombLoops.scala
@@ -53,10 +53,10 @@ case class CombinationalPath(sink: ComponentName, sources: Seq[ComponentName]) e
   }
 }
 
-/** Finds and detects combinational logic loops in a circuit, if any
-  * exist. Returns the input circuit with no modifications.
+/** Finds and detects combinational logic loops in a circuit, if any exist. Returns the input circuit with no
+  * modifications.
   *
-  * @throws CombLoopException if a loop is found
+  * @throws firrtl.transforms.CheckCombLoops.CombLoopException if a loop is found
   * @note Input form: Low FIRRTL
   * @note Output form: Low FIRRTL (identity transform)
   * @note The pass looks for loops through combinational-read memories
diff --git a/src/main/scala/firrtl/transforms/CombineCats.scala b/src/main/scala/firrtl/transforms/CombineCats.scala
index 1265a5c3..ac8fc5fb 100644
--- a/src/main/scala/firrtl/transforms/CombineCats.scala
+++ b/src/main/scala/firrtl/transforms/CombineCats.scala
@@ -13,7 +13,7 @@ import scala.collection.mutable
 case class MaxCatLenAnnotation(maxCatLen: Int) extends NoTargetAnnotation
 
 object CombineCats {
-  /** Mapping from references to the [[Expression]]s that drive them paired with their Cat length */
+  /** Mapping from references to the [[firrtl.ir.Expression Expression]]s that drive them paired with their Cat length */
   type Netlist = mutable.HashMap[WrappedExpression, (Int, Expression)]
 
   def expandCatArgs(maxCatLen: Int, netlist: Netlist)(expr: Expression): (Int, Expression) = expr match {
@@ -65,4 +65,3 @@ class CombineCats extends Transform {
     state.copy(circuit = state.circuit.copy(modules = modulesx))
   }
 }
-
diff --git a/src/main/scala/firrtl/transforms/ConstantPropagation.scala b/src/main/scala/firrtl/transforms/ConstantPropagation.scala
index fdaa7112..66d82c04 100644
--- a/src/main/scala/firrtl/transforms/ConstantPropagation.scala
+++ b/src/main/scala/firrtl/transforms/ConstantPropagation.scala
@@ -313,24 +313,24 @@ class ConstantPropagation extends Transform with ResolvedAnnotationPaths {
     else constPropExpression(nodeMap, instMap, constSubOutputs)(propagated)
   }
 
-  /** Constant propagate a Module
-    *
-    * Two pass process
-    * 1. Propagate constants in expressions and forward propagate references
-    * 2. Propagate references again for backwards reference (Wires)
-    * TODO Replacing all wires with nodes makes the second pass unnecessary
-    *   However, preserving decent names DOES require a second pass
-    *   Replacing all wires with nodes makes it unnecessary for preserving decent names to trigger an
-    *   extra iteration though
-    *
-    * @param m the Module to run constant propagation on
-    * @param dontTouches names of components local to m that should not be propagated across
-    * @param instMap map of instance names to Module name
-    * @param constInputs map of names of m's input ports to literal driving it (if applicable)
-    * @param constSubOutputs Map of Module name to Map of output port name to literal driving it
-    * @return (Constpropped Module, Map of output port names to literal value,
-    *   Map of submodule modulenames to Map of input port names to literal values)
-    */
+  /* Constant propagate a Module
+   *
+   * Two pass process
+   * 1. Propagate constants in expressions and forward propagate references
+   * 2. Propagate references again for backwards reference (Wires)
+   * TODO Replacing all wires with nodes makes the second pass unnecessary
+   *   However, preserving decent names DOES require a second pass
+   *   Replacing all wires with nodes makes it unnecessary for preserving decent names to trigger an
+   *   extra iteration though
+   *
+   * @param m the Module to run constant propagation on
+   * @param dontTouches names of components local to m that should not be propagated across
+   * @param instMap map of instance names to Module name
+   * @param constInputs map of names of m's input ports to literal driving it (if applicable)
+   * @param constSubOutputs Map of Module name to Map of output port name to literal driving it
+   * @return (Constpropped Module, Map of output port names to literal value,
+   *   Map of submodule modulenames to Map of input port names to literal values)
+   */
   @tailrec
   private def constPropModule(
       m: Module,
@@ -419,14 +419,15 @@ class ConstantPropagation extends Transform with ResolvedAnnotationPaths {
         // Const prop registers that are driven by a mux tree containing only instances of one constant or self-assigns
         // This requires that reset has been made explicit
         case Connect(_, lref @ WRef(lname, ltpe, RegKind, _), rhs) if !dontTouches(lname) && !asyncResetRegs(lname) =>
-          /** Checks if an RHS expression e of a register assignment is convertible to a constant assignment.
-            * Here, this means that e must be 1) a literal, 2) a self-connect, or 3) a mux tree of cases (1) and (2).
-            * In case (3), it also recursively checks that the two mux cases are convertible to constants and
-            * uses pattern matching on the returned options to check that they are convertible to the *same* constant.
-            * When encountering a node reference, it expands the node by to its RHS assignment and recurses.
-            *
-            * @return an option containing the literal or self-connect that e is convertible to, if any
-            */
+
+          /* Checks if an RHS expression e of a register assignment is convertible to a constant assignment.
+           * Here, this means that e must be 1) a literal, 2) a self-connect, or 3) a mux tree of cases (1) and (2).
+           * In case (3), it also recursively checks that the two mux cases are convertible to constants and
+           * uses pattern matching on the returned options to check that they are convertible to the *same* constant.
+           * When encountering a node reference, it expands the node by to its RHS assignment and recurses.
+           *
+           * @return an option containing the literal or self-connect that e is convertible to, if any
+           */
           def regConstant(e: Expression): Option[Expression] = e match {
             case lit: Literal => Some(pad(lit, ltpe))
             case WRef(regName, _, RegKind, _) if (regName == lname) => Some(e)
diff --git a/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala b/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala
index 2bce124c..2d04dc89 100644
--- a/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala
+++ b/src/main/scala/firrtl/transforms/FlattenRegUpdate.scala
@@ -11,14 +11,14 @@ import scala.collection.mutable
 
 object FlattenRegUpdate {
 
-  /** Mapping from references to the [[Expression]]s that drive them */
+  /** Mapping from references to the [[firrtl.ir.Expression Expression]]s that drive them */
   type Netlist = mutable.HashMap[WrappedExpression, Expression]
 
   /** Build a [[Netlist]] from a Module's connections and Nodes
     *
-    * This assumes [[LowForm]]
+    * This assumes [[firrtl.LowForm LowForm]]
     *
-    * @param mod [[Module]] from which to build a [[Netlist]]
+    * @param mod [[firrtl.ir.Module Module]] from which to build a [[Netlist]]
     * @return [[Netlist]] of the module's connections and nodes
     */
   def buildNetlist(mod: Module): Netlist = {
@@ -43,8 +43,8 @@ object FlattenRegUpdate {
     * Constructs nested mux trees (up to a certain arbitrary threshold) for register updates. This
     * can result in dead code that this function does NOT remove.
     *
-    * @param mod [[Module]] to transform
-    * @return [[Module]] with register updates flattened
+    * @param mod [[firrtl.ir.Module Module]] to transform
+    * @return [[firrtl.ir.Module Module]] with register updates flattened
     */
   def flattenReg(mod: Module): Module = {
     // We want to flatten Mux trees for reg updates into if-trees for
diff --git a/src/main/scala/firrtl/transforms/ReplaceTruncatingArithmetic.scala b/src/main/scala/firrtl/transforms/ReplaceTruncatingArithmetic.scala
index 9c809c5f..1fe9a723 100644
--- a/src/main/scala/firrtl/transforms/ReplaceTruncatingArithmetic.scala
+++ b/src/main/scala/firrtl/transforms/ReplaceTruncatingArithmetic.scala
@@ -10,15 +10,15 @@ import scala.collection.mutable
 
 object ReplaceTruncatingArithmetic {
 
-  /** Mapping from references to the [[Expression]]s that drive them */
+  /** Mapping from references to the [[firrtl.ir.Expression Expression]]s that drive them */
   type Netlist = mutable.HashMap[WrappedExpression, Expression]
 
   private val SeqBIOne = Seq(BigInt(1))
 
   /** Replaces truncating arithmetic in an Expression
     *
-    * @param netlist a '''mutable''' HashMap mapping references to [[DefNode]]s to their connected
-    * [[Expression]]s. It is '''not''' mutated in this function
+    * @param netlist a '''mutable''' HashMap mapping references to [[firrtl.ir.DefNode DefNode]]s to their connected
+    * [[firrtl.ir.Expression Expression]]s. It is '''not''' mutated in this function
     * @param expr the Expression being transformed
     * @return Returns expr with truncating arithmetic replaced
     */
@@ -35,8 +35,9 @@ object ReplaceTruncatingArithmetic {
 
   /** Replaces truncating arithmetic in a Statement
     *
-    * @param netlist a '''mutable''' HashMap mapping references to [[DefNode]]s to their connected
-    * [[Expression]]s. This function '''will''' mutate it if stmt contains a [[DefNode]]
+    * @param netlist a '''mutable''' HashMap mapping references to [[firrtl.ir.DefNode DefNode]]s to their connected
+    * [[firrtl.ir.Expression Expression]]s. This function '''will''' mutate it if stmt contains a [[firrtl.ir.DefNode
+    * DefNode]]
     * @param stmt the Statement being searched for nodes and transformed
     * @return Returns stmt with truncating arithmetic replaced
     */
@@ -70,4 +71,3 @@ class ReplaceTruncatingArithmetic extends Transform {
     state.copy(circuit = state.circuit.copy(modules = modulesx))
   }
 }
-