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* Deprecate firrtl.passes.ToWorkingIR
Deprecate ToWorkingIR as it is now an identity transform.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
* Deprecate firrtl.stage.Forms.WorkingIR
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
* Switch from Forms.WorkingIR to Forms.MinimalHighForm
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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* Check Unidoc on all versions of Scala
It is required for publishing and we publish every version
* Fix conflicting cross-version suffixes issue
When running `sbt ++2.13.4 unidoc`, SBT would set the Scala version
for the fuzzer and benchmark projects even though they aren't really
relevant to the command. This may be a misconfiguration or a bug in
the unidoc plugin. Whatever the case, simply making it possible for
them to use the same version of Scala as the firrtl project (on which
they depend) fixes the issue.
* Match versions of Scala in build.sbt and CI
* Fix unidoc issues in 2.13.4
There is some bug in ScalaDoc not finding some links in firrtl.options
so those links were made absolute as a workaround.
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Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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* split big Emitter to submodules.
* fix all deprecated warning.
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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* InstanceKeyGraph: add staticInstanceCount, getGraph and getChildrenInstanceMap
* InstanceKeyGraph: reachableModules, unreachableModules, lowestCommonAncestor and fullHierarchy
* Replace usage of InstanceGraph with InstanceKeyGraph
Also deprecates all unused methods.
* WiringUtils: make new version of sinksToSources package private
This will make our live easier next time we need to change it.
* CircuitGraph: use InstanceKeyGraph
* InstanceKeyGraphSpec: respect maximum line width
* InstanceKeyGraph: make constructor private
* InstanceKeyGraph: move lowestCommonAncestor function to Wiring
* WiringUtils: update deprecation message
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* WiringUtils.sinksToSources: make sinkInsts order deterministic
* WiringUtils: make owners a LinkedHashMap
* Wiring: only make something a Wire if it isn't a port already
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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This mixes in the new DependencyAPIMigration trait into all Transforms
and Passes. This enables in-tree transforms/passes to build without
deprecation warnings associated with the deprecated CircuitForm.
As a consequence of this, every Transform now has UnknownForm as both
its inputForm and outputForm. This PR modifies legacy Compiler and
testing infrastructure to schedule transforms NOT using
mergeTransforms/getLoweringTransforms (which rely on inputForm and
outputForm not being UnknownForm), but instead using the Dependency
API.
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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* Add sbt-scalafix
* Add scalafix guide to README
* Remove Unused Import
* Remove deprecated procedure syntax
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Formerly #865
Major Code Changes/Features Added:
Added Target trait as replacement for Named
Added TargetToken as token in building Target
Added GenericTarget as a catch-all Target
Added CircuitTarget, ModuleTarget, ReferenceTarget, and InstanceTarget
Added ResolvePaths annotation
Added EliminateTargetPaths (and helper class DuplicationHelper)
Updated Dedup to work with instance annotations
Updated RenameMap to work with instance annotations
DCE & ConstantProp extend ResolveAnnotationPaths
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This reverts commit 7e2f787e125227dc389d5cf1d09717748ecfed2e.
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Added Target, which now supports Instance Annotations. See #865 for details.
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The following are deprecated in favor of DiGraph/InstanceGraph:
- firrtl.passes.wiring.Lineage
- firrtl.passes.wiring.WiringUtils.ChildrenMap
- firrtl.passes.wiring.WiringUtils.getChildrenMap
- firrtl.passes.wiring.WiringUtils.getLineage
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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* Make WiringTransform remove its used annotations
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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Large amounts of Wiring could result in huge nesting of Statements. This could
cause stack overflows using the Mappers. Fixed by no longer nesting Statements
in Wiring Pass.
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- Old Annotation renamed to deprecated LegacyAnnotation
- Annotation is now a trait that can be extended
- New JsonProtocol for Annotation [de]serialization
- Replace AnnotationMap with AnnotationSeq
- Deprecate Transform.getMyAnnotations
- Update Transforms
- Turn on deprecation warnings
- Remove deprecated Driver.compile
- Make AnnotationTests abstract with Legacy and Json subclasses
- Add functionality to convert LegacyAnnotations of built-in annos
This will give a noisy warning and is more of a best effort than a
robust solution.
Fixes #475 Closes #609
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Massive refactoring to WiringTransform with the use of a new EulerTour
class to speed things up via fast least common ancestor (LCA) queries.
Changes include (but are not limited to):
* Use lowest common ancestor when wiring
* Add EulerTour class with naive and Berkman-Vishkin RMQ
* Adds LCA method for Instance Graph
* Enables "Two Sources" using "Top" wiring test as this is now valid
* Remove TopAnnotation from WiringTransform
* Represent WiringTransform sink as `Seq[Named]`
* Remove WiringUtils.countInstances, fix imports
* Support sources under sinks in WiringTransform
* Enable internal module wiring
* Support Wiring of Aggregates
h/t @edcote
fixes #728
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Reviewed-by: Jack Koenig<jack.koenig3@gmail.com>
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Now, any annotation not propagated by a transform is considered deleted.
A new DeletedAnnotation is added in place of it.
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Restricts annotations to be string-based (and thus less typesafe)
Makes annotations more easily serializable and interact with Chisel
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* Fixed multi wiring
* Minor style changes
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Added clocklist transform
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getMyAnnotations now returns Seq[Annotation]
Changed test to check number of annotations is the same
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Replace with more sensible comment to see LICENSE rather than including the
whole license in every file
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* Transform Ids now handled by Class[_ <: Transform] instead of magic numbers
* Transforms define inputForm and outputForm
* Custom transforms can be inserted at runtime into compiler or the Driver
* Current "built-in" custom transforms handled via above mechanism
* Verilog-specific passes moved to the Verilog emitter
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Added wiring pass and simple test
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