sfcX - Scala FIRRTL Compiler for chiselX

Age	Commit message (Collapse)	Author
2016-10-17	Reorganized memory blackboxing (#336)	Adam Izraelevitz
	* Reorganized memory blackboxing Moved to new package memlib Added comments Moved utility functions around Removed unused AnnotateValidMemConfigs.scala * Fixed tests to pass * Use DefAnnotatedMemory instead of AppendableInfo * Broke passes up into simpler passes AnnotateMemMacros -> (ToMemIR, ResolveMaskGranularity) UpdateDuplicateMemMacros -> (RenameAnnotatedMemoryPorts, ResolveMemoryReference) * Fixed to make tests run * Minor changes from code review * Removed vim comments and renamed ReplSeqMem
2016-10-11	Scala style cleanup take 5 (#324)	Chick Markley
	* working through variable shrouding * working through variable shrouding * working through variable shadowing * working through variable shadowing hmm there are some very fragile match {} in Passes * working through variable shadowing hmm there are some very fragile match {} in Passes * working through variable shadowing * working through variable shadowing * working through variable shadowing * working through variable shadowing * working through variable shadowing * working through variable shadowing * working through variable shadowing * working through variable shadowing * Fixes suggested by Adam
2016-09-27	eliminate postfix operator problematic statements	chick

2016-09-27	remove unnecessary parentheses	chick

2016-09-23	Use parens on Unit methods	chick

2016-09-23	use .isEmpty, .nonEmpty, isDefined	chick

2016-09-21	refactor AnnotateValidMemConfigs	Donggyu Kim

2016-09-06	Address style feedback and add tests for getConnectOrigin utility	Angie

2016-09-06	Support optionally filling write mask to data width via transform input ↵	Angie
	config file
2016-09-06	Expanded annotations for valid memory sizes	Angie

2016-09-06	Edited conf generation to handle mem namespace collision	Angie
	* Also started separate pass for annotating valid memory