| Age | Commit message (Expand) | Author |
|---|---|---|
| 2022-03-02 | Fold VerilogModulusCleanup into LegalizeVerilog (#2485) | Jack Koenig |
| 2021-08-02 | add emitter for optimized low firrtl (#2304) | Kevin Laeufer |
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index : sfcX | |
| Scala FIRRTL Compiler for chiselX |
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