aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)Author
2016-04-06Merge pull request #102 from ucb-bar/propagate-mem-port-typesAdam Izraelevitz
2016-04-04Wrapped delay in ifndef verilator, as it is not supported by verilatorAdam Izraelevitz
2016-04-01Propagate memory port types in EmitterAndrew Waterman
2016-04-01Update sbt to version 0.13.11Andrew Waterman
2016-03-24Merge pull request #93 from ucb-bar/fix-chirrtl-serializeAndrew Waterman
2016-03-24Fix Chirrtl serialization bugjackkoenig
2016-03-18Merge pull request #92 from ucb-bar/guard-printf-stopAndrew Waterman
2016-03-18Add guard to emission of simulation constructsjackkoenig
2016-03-15Change non-reentrant VerilogEmitter from object to classJack
2016-03-15Revamp string literal handlingjackkoenig
2016-03-10Add support for right shift by amount larger than argument widthjackkoenig
2016-03-10Add Module Mappersjackkoenig
2016-03-09Merge pull request #88 from davidbiancolin/grammar_strlit_fixAndrew Waterman
2016-03-09Fix StringLit to ignore escaped double quotesdavidbiancolin
2016-03-06Merge pull request #83 from ucb-bar/travisJack Koenig
2016-03-05Fix the stanza wrapper for TravisPalmer Dabbelt
2016-03-05Use $(MAKE), not makePalmer Dabbelt
2016-03-03Remove unused files: DebugUtils and original Passesjackkoenig
2016-03-03Merge pull request #81 from ucb-bar/add-testsAndrew Waterman
2016-03-03Add some integration tests: successful compilation and executionjackkoenig
2016-03-02Remove implicits from serializejackkoenig
2016-03-01Move mapper functions to implicit methods on IR vertices.jackkoenig
2016-02-26Merge pull request #77 from ucb-bar/separate-serializeJack Koenig
2016-02-25Merge pull request #78 from ucb-bar/travis-add-chisel3Jim Lawson
2016-02-25Remove brittle rocket comparison to expected verilog test.jackkoenig
2016-02-25Travis updates: add Verilator and Chisel3 testsjackkoenig
2016-02-25Separate serialize functions into separate filejackkoenig
2016-02-25Remove FlagUtils and related unused debug printingjackkoenig
2016-02-25Remove unused code in Driver, update help messagejackkoenig
2016-02-24Fixed printf bugs in scala and stanza versions. Required special casing print...Adam Izraelevitz
2016-02-24Make rocket-golden.v match output of #75jackkoenig
2016-02-24Make rocket.fir regression test fail nicer on consolejackkoenig
2016-02-24Merge pull request #72 from ucb-bar/fix-printfJack Koenig
2016-02-24Quick fix for printf in the emitted VerilogKamyar Mohajerani
2016-02-23Merge pull request #67 from ucb-bar/travisJack Koenig
2016-02-23Decouple stanza from scala build; use $(install_dir) where appropriate.Jim Lawson
2016-02-23Initial travis configuration.Jim Lawson
2016-02-23Merge branch 'master' of github.com:ucb-bar/firrtlazidar
2016-02-23Updated pdfazidar
2016-02-23Add rocket regression, just runs rocket.fir through Verilog compiler and comp...Jack
2016-02-23Change FIRRTL Compiler to remove CHIRRTL and Check High FIRRTL FormJack
2016-02-23Stop closing writers in compiler, close in Driver instead (allows others to u...Jack
2016-02-22Change default log-level to warn, users should change manually if so desiredJack
2016-02-22Temporary Fix: get_type on depth=1 memories causing IntWidth(0) typesJack
2016-02-19Merge pull request #63 from mattwhiteside/masterAdam Izraelevitz
2016-02-19The 'make set-osx' step is symlinking to the wrong file. This fixes it.Matt Whiteside
2016-02-11Merge pull request #61 from ucb-bar/infer_memPalmer Dabbelt
2016-02-10Re-enable some passesPalmer Dabbelt
2016-02-09Updated Readmeazidar
2016-02-09Merge branch 'master' of github.com:ucb-bar/firrtlazidar
generated by cgit v1.2.3 (git 2.25.1) at 2026-03-01 13:30:42 +0000