diff options
| author | azidar | 2015-08-24 11:45:37 -0700 |
|---|---|---|
| committer | azidar | 2015-08-24 11:45:37 -0700 |
| commit | 5d3061bfed8445370e6fa97ec9238ba49e8fafbc (patch) | |
| tree | ba0373c05118215fa332c9e7cd10233a69800f53 /test/passes/infer-types | |
| parent | 50cf7a4823d69967dcb2b10cdef892b0ab5f2184 (diff) | |
Changed all tests to use verilog backend.
Diffstat (limited to 'test/passes/infer-types')
| -rw-r--r-- | test/passes/infer-types/bundle.fir | 2 | ||||
| -rw-r--r-- | test/passes/infer-types/gcd.fir | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/test/passes/infer-types/bundle.fir b/test/passes/infer-types/bundle.fir index c24419b9..50f1c84b 100644 --- a/test/passes/infer-types/bundle.fir +++ b/test/passes/infer-types/bundle.fir @@ -1,4 +1,4 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p ct 2>&1 | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.v -X verilog -p ct 2>&1 | tee %s.out | FileCheck %s ;CHECK: Infer Types circuit top : diff --git a/test/passes/infer-types/gcd.fir b/test/passes/infer-types/gcd.fir index 20f4a340..fa14eb38 100644 --- a/test/passes/infer-types/gcd.fir +++ b/test/passes/infer-types/gcd.fir @@ -1,4 +1,4 @@ -; RUN: firrtl -i %s -o %s.flo -X flo -p ct 2>&1 | tee %s.out | FileCheck %s +; RUN: firrtl -i %s -o %s.v -X verilog -p ct 2>&1 | tee %s.out | FileCheck %s ;CHECK: Infer Types circuit top : |