Remove stanza (#231)

* Removed stanza implementation/tests.

In the future we can move the stanza tests over, but for now they should
be deleted.

* Added back integration .fir files

* Added Makefile to give Travis hooks

* Added firrtl script (was ignored before)

7 files changed, 0 insertions, 175 deletions

diff --git a/test/parser/bundle.fir b/test/parser/bundle.fir
deleted file mode 100644
index 16a72a1b..00000000
--- a/test/parser/bundle.fir
+++ /dev/null
@@ -1,44 +0,0 @@
-; RUN: firrtl -i %s -o %s.out -X firrtl && cat %s.out | FileCheck %s
-
-circuit top :
-   module top :
-      wire z : { x : UInt, flip y: SInt}
-      z.x <= UInt(1)
-      z.y <= SInt(1)
-      node x = z.x            
-      node y = z.y            
-      wire a : UInt<3>[10]    
-      a[0] <= UInt(1)
-      a[1] <= UInt(1)
-      a[2] <= UInt(1)
-      a[3] <= UInt(1)
-      a[4] <= UInt(1)
-      a[5] <= UInt(1)
-      a[6] <= UInt(1)
-      a[7] <= UInt(1)
-      a[8] <= UInt(1)
-      a[9] <= UInt(1)
-      node b = a[2]           
-      node c = a[UInt(3)]     
-
-; CHECK: circuit top :
-; CHECK:    module top :
-; CHECK:       wire z : { x : UInt, flip y : SInt}
-; CHECK:       z.x <= UInt<1>("h1")
-; CHECK:       z.y <= SInt<2>("h1")
-; CHECK:       node x = z.x            
-; CHECK:       node y = z.y            
-; CHECK:       wire a : UInt<3>[10]    
-; CHECK:       a[0] <= UInt<1>("h1")
-; CHECK:       a[1] <= UInt<1>("h1")
-; CHECK:       a[2] <= UInt<1>("h1")
-; CHECK:       a[3] <= UInt<1>("h1")
-; CHECK:       a[4] <= UInt<1>("h1")
-; CHECK:       a[5] <= UInt<1>("h1")
-; CHECK:       a[6] <= UInt<1>("h1")
-; CHECK:       a[7] <= UInt<1>("h1")
-; CHECK:       a[8] <= UInt<1>("h1")
-; CHECK:       a[9] <= UInt<1>("h1")
-; CHECK:       node b = a[2]           
-; CHECK:       node c = a[UInt<2>("h3")] 
-
diff --git a/test/parser/dshl.fir b/test/parser/dshl.fir
deleted file mode 100644
index 99a6ec7d..00000000
--- a/test/parser/dshl.fir
+++ /dev/null
@@ -1,14 +0,0 @@
-; RUN: firrtl -i %s -o %s.out -X firrtl && cat %s.out | FileCheck %s
-circuit GCD : 
-  module GCD : 
-    input a : UInt<63>
-    input b : UInt<63>
-    input sign : UInt<1>
-    output d : UInt
-    ;wire T_205 : UInt
-    node T_203 = UInt<6>("h3f")
-    node normCount = not(T_203)
-    node absIn = mux(sign, a, b)
-    node T_205 = dshl(absIn, normCount)
-    d <= T_205
-
diff --git a/test/parser/gcd.fir b/test/parser/gcd.fir
deleted file mode 100644
index 45a048f2..00000000
--- a/test/parser/gcd.fir
+++ /dev/null
@@ -1,54 +0,0 @@
-; RUN: firrtl -i %s -o %s.out -X firrtl && cat %s.out | FileCheck %s
-circuit GCD : 
-  module GCD : 
-    input e : UInt<1>
-    input clk : Clock
-    input reset : UInt<1>
-    output z : UInt
-    output v : UInt<1>
-    input a : UInt<16>
-    input b : UInt<16>
-    
-    reg x : UInt<16>,clk
-    reg y : UInt<16>,clk
-    node T_17 = gt(x, y)
-    when T_17 : 
-      node T_18 = tail(sub(x, y), 1)
-      x <= T_18
-    else : 
-      node T_19 = tail(sub(y, x), 1)
-      y <= T_19
-    when e : 
-      x <= a
-      y <= b
-    z <= x
-    node T_20 = eq(y, UInt<1>(0))
-    v <= T_20
-
-; CHECK: circuit GCD : 
-; CHECK:   module GCD : 
-; CHECK:     input e : UInt<1>
-; CHECK:     input clk : Clock
-; CHECK:     input reset : UInt<1>
-; CHECK:     output z : UInt<16>
-; CHECK:     output v : UInt<1>
-; CHECK:     input a : UInt<16>
-; CHECK:     input b : UInt<16>
-; CHECK:     reg x : UInt<16>, clk with : 
-; CHECK:       reset => (UInt<1>("h0"), x)
-; CHECK:     reg y : UInt<16>, clk with : 
-; CHECK:       reset => (UInt<1>("h0"), y)
-; CHECK:     node T_17 = gt(x, y)
-; CHECK:     when T_17 : 
-; CHECK:       node T_18 = tail(sub(x, y), 1)
-; CHECK:       x <= T_18
-; CHECK:     else :
-; CHECK:       node T_19 = tail(sub(y, x), 1)
-; CHECK:       y <= T_19
-; CHECK:     when e : 
-; CHECK:       x <= a
-; CHECK:       y <= b
-; CHECK:     z <= x
-; CHECK:     node T_20 = eq(y, UInt<1>("h0"))
-; CHECK:     v <= T_20
-
diff --git a/test/parser/ints.fir b/test/parser/ints.fir
deleted file mode 100644
index 0c79276b..00000000
--- a/test/parser/ints.fir
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: firrtl -i %s -o %s.out -X firrtl 2>&1 | tee %s.out | FileCheck %s
-: XFAIL: *
-
-circuit top :
-   module top :
-      output a : UInt
-      output b : SInt
-      output c : SInt
-      a <= UInt(8)
-      b <= SInt(8)
-      c <= SInt(-8)
-
-; CHECK: circuit top :
-; CHECK:   module top :
-; CHECK:      output a : UInt
-; CHECK:      output b : SInt
-; CHECK:      output c : SInt
-; CHECK:      a <= UInt<4>("h8")
-; CHECK:      b <= SInt<5>("h08")
-; CHECK:      c <= SInt<4>("h8")
diff --git a/test/parser/invalids.fir b/test/parser/invalids.fir
deleted file mode 100644
index 65051832..00000000
--- a/test/parser/invalids.fir
+++ /dev/null
@@ -1,13 +0,0 @@
-; RUN: firrtl -i %s -o %s.out -X firrtl && cat %s.out | FileCheck %s
-; CHECK: Done!
-circuit GCD : 
-   module GCD : 
-      input x : UInt<128>
-      input p : UInt<1>
-      input q : UInt<1>
-      input clk : Clock
-      wire w : UInt[3]
-      w is invalid
-      w[0] <= UInt(0)
-      w[1] <= UInt(0)
-      w[2] <= UInt(0)
diff --git a/test/parser/mux.fir b/test/parser/mux.fir
deleted file mode 100644
index 4705aa75..00000000
--- a/test/parser/mux.fir
+++ /dev/null
@@ -1,14 +0,0 @@
-; RUN: firrtl -i %s -o %s.out -X firrtl && cat %s.out | FileCheck %s
-circuit GCD : 
-  module GCD : 
-    input e : UInt<1>
-    input f : UInt<1>
-    input g : UInt<1>
-    output o : UInt<1>
-    node y = f
-    node z = f
-    node x = mux(UInt<1>(0),y,z)
-    o <= x
-
-    
-
diff --git a/test/parser/node.fir b/test/parser/node.fir
deleted file mode 100644
index 193aed88..00000000
--- a/test/parser/node.fir
+++ /dev/null
@@ -1,16 +0,0 @@
-; RUN: firrtl -i %s -o %s.out -X firrtl && cat %s.out | FileCheck %s
-; CHECK: Done!
-circuit GCD : 
-   module GCD : 
-      input x : UInt<128>
-      input p : UInt<1>
-      input q : UInt<1>
-      input clk : Clock
-      reg addr : UInt, clk with :         
-         reset => (UInt<1>("h0"), addr)
-      when p :
-         node T_1234 = bits(x, 63, 24)
-         addr <= T_1234
-      when q :
-         node T_1380 = tail(x, 1)
-         addr <= T_1380